diff mbox series

[V2,1/5] tty: serial: fsl_lpuart: only enable Idle Line Interrupt for non-dma case

Message ID 20221110081728.10172-2-sherry.sun@nxp.com
State New
Headers
Series fsl_lpuart: improve Idle Line Interrupt and registers handle in .shutdown() |

Commit Message

Sherry Sun Nov. 10, 2022, 8:17 a.m. UTC 
  For the lpuart driver, the Idle Line Interrupt Enable now is only needed
for the CPU mode, so enable the UARTCTRL_ILIE at the correct place, and
clear it when shutdown.

Also need to configure the suitable UARTCTRL_IDLECFG, now the value is
0x7, represent 128 idle characters will trigger the Idle Line Interrupt.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
Changes in V2:
1. Use FIELD_PREP() and GENMASK() for easy access to UARTCTRL_IDLECFG
fields as suggested by Ilpo.
---
 drivers/tty/serial/fsl_lpuart.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

Comments

Greg KH Nov. 22, 2022, 4:56 p.m. UTC | #1 
On Thu, Nov 10, 2022 at 04:17:24PM +0800, Sherry Sun wrote:
> For the lpuart driver, the Idle Line Interrupt Enable now is only needed
> for the CPU mode, so enable the UARTCTRL_ILIE at the correct place, and
> clear it when shutdown.
> 
> Also need to configure the suitable UARTCTRL_IDLECFG, now the value is
> 0x7, represent 128 idle characters will trigger the Idle Line Interrupt.
> 
> Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> ---
> Changes in V2:
> 1. Use FIELD_PREP() and GENMASK() for easy access to UARTCTRL_IDLECFG
> fields as suggested by Ilpo.
> ---
>  drivers/tty/serial/fsl_lpuart.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)

This commit breaks the build for me as FIELD_PREP() does not seem to be
included properly :(

Please fix up and resend.

thanks,

greg k-h
Sherry Sun Nov. 23, 2022, 10:28 a.m. UTC | #2 
> -----Original Message-----
> From: Greg KH <gregkh@linuxfoundation.org>
> Sent: 2022年11月23日 0:56
> To: Sherry Sun <sherry.sun@nxp.com>
> Cc: jirislaby@kernel.org; michael@walle.cc; jingchang.lu@freescale.com;
> tomonori.sakita@sord.co.jp; atsushi.nemoto@sord.co.jp; linux-
> serial@vger.kernel.org; linux-kernel@vger.kernel.org; dl-linux-imx <linux-
> imx@nxp.com>
> Subject: Re: [PATCH V2 1/5] tty: serial: fsl_lpuart: only enable Idle Line
> Interrupt for non-dma case
> 
> On Thu, Nov 10, 2022 at 04:17:24PM +0800, Sherry Sun wrote:
> > For the lpuart driver, the Idle Line Interrupt Enable now is only
> > needed for the CPU mode, so enable the UARTCTRL_ILIE at the correct
> > place, and clear it when shutdown.
> >
> > Also need to configure the suitable UARTCTRL_IDLECFG, now the value is
> > 0x7, represent 128 idle characters will trigger the Idle Line Interrupt.
> >
> > Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> > ---
> > Changes in V2:
> > 1. Use FIELD_PREP() and GENMASK() for easy access to UARTCTRL_IDLECFG
> > fields as suggested by Ilpo.
> > ---
> >  drivers/tty/serial/fsl_lpuart.c | 11 ++++++-----
> >  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> This commit breaks the build for me as FIELD_PREP() does not seem to be
> included properly :(
> 
> Please fix up and resend.

Hi Greg,

It is strange that the build is pass at my side. But anyway, I will include the corresponding head files for FIELD_PREP/GENMASK and resend it.
Sorry for the inconvenience.

Best Regards
Sherry
diff mbox series

Patch

diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index bd685491eead..a8f8e535077a 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -179,7 +179,7 @@ 
 #define UARTCTRL_SBK		0x00010000
 #define UARTCTRL_MA1IE		0x00008000
 #define UARTCTRL_MA2IE		0x00004000
-#define UARTCTRL_IDLECFG	0x00000100
+#define UARTCTRL_IDLECFG	GENMASK(10, 8)
 #define UARTCTRL_LOOPS		0x00000080
 #define UARTCTRL_DOZEEN		0x00000040
 #define UARTCTRL_RSRC		0x00000020
@@ -1506,7 +1506,7 @@  static void lpuart32_setup_watermark(struct lpuart_port *sport)
 	ctrl = lpuart32_read(&sport->port, UARTCTRL);
 	ctrl_saved = ctrl;
 	ctrl &= ~(UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_TE |
-			UARTCTRL_RIE | UARTCTRL_RE);
+			UARTCTRL_RIE | UARTCTRL_RE | UARTCTRL_ILIE);
 	lpuart32_write(&sport->port, ctrl, UARTCTRL);
 
 	/* enable FIFO mode */
@@ -1530,7 +1530,8 @@  static void lpuart32_setup_watermark_enable(struct lpuart_port *sport)
 	lpuart32_setup_watermark(sport);
 
 	temp = lpuart32_read(&sport->port, UARTCTRL);
-	temp |= UARTCTRL_RE | UARTCTRL_TE | UARTCTRL_ILIE;
+	temp |= UARTCTRL_RE | UARTCTRL_TE;
+	temp |= FIELD_PREP(UARTCTRL_IDLECFG, 0x7);
 	lpuart32_write(&sport->port, temp, UARTCTRL);
 }
 
@@ -1669,7 +1670,7 @@  static void lpuart32_configure(struct lpuart_port *sport)
 	}
 	temp = lpuart32_read(&sport->port, UARTCTRL);
 	if (!sport->lpuart_dma_rx_use)
-		temp |= UARTCTRL_RIE;
+		temp |= UARTCTRL_RIE | UARTCTRL_ILIE;
 	if (!sport->lpuart_dma_tx_use)
 		temp |= UARTCTRL_TIE;
 	lpuart32_write(&sport->port, temp, UARTCTRL);
@@ -1770,7 +1771,7 @@  static void lpuart32_shutdown(struct uart_port *port)
 
 	/* disable Rx/Tx and interrupts */
 	temp = lpuart32_read(port, UARTCTRL);
-	temp &= ~(UARTCTRL_TE | UARTCTRL_RE |
+	temp &= ~(UARTCTRL_TE | UARTCTRL_RE | UARTCTRL_ILIE |
 			UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_RIE);
 	lpuart32_write(port, temp, UARTCTRL);