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Wed, 9 Nov 2022 12:20:01 -0600 From: Hamza Mahfooz To: CC: Hamza Mahfooz , Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Pan, Xinhui" , David Airlie , Daniel Vetter , Nicholas Kazlauskas , "Roman Li" , Fangzhi Zuo , Aurabindo Pillai , , Subject: [PATCH v2] drm/amd/display: only fill dirty rectangles when PSR is enabled Date: Wed, 9 Nov 2022 13:20:09 -0500 Message-ID: <20221109182010.171534-1-hamza.mahfooz@amd.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT012:EE_|CY8PR12MB7338:EE_ X-MS-Office365-Filtering-Correlation-Id: cbf720c9-ee66-4adf-1362-08dac27f0677 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: VLQy3eDGdCehxIBWbVgHgCrOvrZcN4KS6eC9lPueCp8ra/GZrsaJ2bSKFs7qYfJgbWi91IbZCLQ+DzbMbpuaZIbYI00ZmabD/LX+fIkf9aFRZY3TVaGoMyvLzS00fLmYYjxFNixAIxV+nv+A4UAn5HjiRZCNWSszO61ZP7VU3oI8QuRo/IYhMonXdr9r7pT0fgu31LSWkjrLLzauWGZVpzdE4d+uLBY0MwgDo1mmyeOihw6hfsNu1RHm9DfwuQJ9iyInXai5wkyA5TqVM6PhngSc0YqJ9KkdfMhMIXF61kGSuyPDBrwDZz1bocsAv8CKAzBa6rmvMKOYfPWohN1w2T99zdpEzYSkQ5ziRuXJhAYvtfMFlXd0EbP97sU+b+UA8OIFtR67nZrgqmacP/KGAPU/7eLgPpZzwzwm8/xRFlS9i10nZ6u+mho4Slq3e0KCHSVg6VzveafO+dO6veJYRY5wURef4f6nA+lsSeMQMiEy6fepqSAu7rs7YGTKXYIOAfdqb8SAZHVVwV+yy/NvqO2VHAo7wHZRNbHPS9Je6YHW5rA8Oy2jik/jkoM18d77DpRhGpBAU4mCREw72VCiLSkJyUwN83I34sbZLdkHSfmSXBO2IN4Ng6vvByTLng0kLPc9xjsqvrXiy4ROZ2+pHSWIgLymh9b21YitjMpr1XydQXtLAXCdy7ZJUeNi1ReB86xH+yHvDFIIhRtEVLbR8hUDBh5BN8xLZsDZfITkH3vE1Zhov9DDrpMdASDzlx8pEt3dxQ3Lsmi2W5jdGR07OxwWtnMgXTh0mcTuGbV7JFgtOwl0qMSDr+TD7A8hpukmyAX9kGtYT6RXH2UzdR/PhVgSToFeOFbWQFgEFRws8w4= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(376002)(136003)(346002)(396003)(451199015)(40470700004)(46966006)(36840700001)(86362001)(26005)(7696005)(478600001)(36860700001)(8936002)(316002)(41300700001)(36756003)(6916009)(54906003)(2616005)(1076003)(8676002)(16526019)(40460700003)(83380400001)(426003)(47076005)(336012)(186003)(40480700001)(70206006)(82310400005)(44832011)(5660300002)(2906002)(70586007)(82740400003)(4326008)(81166007)(356005)(14143004)(36900700001)(16060500005);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2022 18:20:04.9886 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cbf720c9-ee66-4adf-1362-08dac27f0677 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT012.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7338 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749041765895004786?= X-GMAIL-MSGID: =?utf-8?q?1749043896837151736?= Currently, we are calling fill_dc_dirty_rects() even if PSR isn't supported by the relevant link in amdgpu_dm_commit_planes(), this is undesirable especially because when drm.debug is enabled we are printing messages in fill_dc_dirty_rects() that are only useful for debugging PSR (and confusing otherwise). So, we can instead limit the filling of dirty rectangles to only when PSR is enabled. Signed-off-by: Hamza Mahfooz Reviewed-by: Leo Li --- v2: give a more concrete reason. --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 66eb16fbe09f..956a6e494709 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -7697,9 +7697,10 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, bundle->surface_updates[planes_count].plane_info = &bundle->plane_infos[planes_count]; - fill_dc_dirty_rects(plane, old_plane_state, new_plane_state, - new_crtc_state, - &bundle->flip_addrs[planes_count]); + if (acrtc_state->stream->link->psr_settings.psr_feature_enabled) + fill_dc_dirty_rects(plane, old_plane_state, + new_plane_state, new_crtc_state, + &bundle->flip_addrs[planes_count]); /* * Only allow immediate flips for fast updates that don't