Message ID | 20221109105140.48196-3-krzysztof.kozlowski@linaro.org |
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State | New |
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[88.156.142.199]) by smtp.gmail.com with ESMTPSA id l10-20020a056512110a00b004b005150e92sm2167508lfg.127.2022.11.09.02.51.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 02:51:45 -0800 (PST) From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: Bjorn Andersson <andersson@kernel.org>, Andy Gross <agross@kernel.org>, Konrad Dybcio <konrad.dybcio@somainline.org>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Konrad Dybcio <konrad.dybcio@linaro.org> Subject: [PATCH v2 3/3] ARM: dts: qcom-msm8960-cdp: align TLMM pin configuration with DT schema Date: Wed, 9 Nov 2022 11:51:40 +0100 Message-Id: <20221109105140.48196-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221109105140.48196-1-krzysztof.kozlowski@linaro.org> References: <20221109105140.48196-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749015781675814456?= X-GMAIL-MSGID: =?utf-8?q?1749015781675814456?= |
Series |
[v2,1/3] dt-bindings: pinctrl: qcom,msm8960: convert to dtschema
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Commit Message
Krzysztof Kozlowski
Nov. 9, 2022, 10:51 a.m. UTC
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- Changes since v1: 1. Add Rb tag --- arch/arm/boot/dts/qcom-msm8960-cdp.dts | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-)
Comments
On Wed, Nov 09, 2022 at 11:51:40AM +0100, Krzysztof Kozlowski wrote: > DT schema expects TLMM pin configuration nodes to be named with > '-state' suffix and their optional children with '-pins' suffix. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > --- > > Changes since v1: > 1. Add Rb tag > --- > arch/arm/boot/dts/qcom-msm8960-cdp.dts | 19 +++++++++---------- > 1 file changed, 9 insertions(+), 10 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts > index 3a484ac53917..9a3a510f88ca 100644 > --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts > +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts > @@ -60,33 +60,32 @@ &gsbi5_serial { > }; > > &msmgpio { > - spi1_default: spi1_default { > - mux { > - pins = "gpio6", "gpio7", "gpio9"; > - function = "gsbi1"; > - }; > - > - mosi { > + spi1_default: spi1-default-state { > + mosi-pins { > pins = "gpio6"; > + function = "gsbi1"; > drive-strength = <12>; > bias-disable; > }; > > - miso { > + miso-pins { > pins = "gpio7"; > + function = "gsbi1"; > drive-strength = <12>; > bias-disable; > }; > > - cs { > + cs-pins { > pins = "gpio8"; > + function = "gpio"; I'm changing this to "gsbi1" while applying this patch. Regards, Bjorn > drive-strength = <12>; > bias-disable; > output-low; > }; > > - clk { > + clk-pins { > pins = "gpio9"; > + function = "gsbi1"; > drive-strength = <12>; > bias-disable; > }; > -- > 2.34.1 >
On 10/11/2022 04:37, Bjorn Andersson wrote: > On Wed, Nov 09, 2022 at 11:51:40AM +0100, Krzysztof Kozlowski wrote: >> DT schema expects TLMM pin configuration nodes to be named with >> '-state' suffix and their optional children with '-pins' suffix. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> >> --- >> >> Changes since v1: >> 1. Add Rb tag >> --- >> arch/arm/boot/dts/qcom-msm8960-cdp.dts | 19 +++++++++---------- >> 1 file changed, 9 insertions(+), 10 deletions(-) >> >> diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts >> index 3a484ac53917..9a3a510f88ca 100644 >> --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts >> +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts >> @@ -60,33 +60,32 @@ &gsbi5_serial { >> }; >> >> &msmgpio { >> - spi1_default: spi1_default { >> - mux { >> - pins = "gpio6", "gpio7", "gpio9"; >> - function = "gsbi1"; >> - }; >> - >> - mosi { >> + spi1_default: spi1-default-state { >> + mosi-pins { >> pins = "gpio6"; >> + function = "gsbi1"; >> drive-strength = <12>; >> bias-disable; >> }; >> >> - miso { >> + miso-pins { >> pins = "gpio7"; >> + function = "gsbi1"; >> drive-strength = <12>; >> bias-disable; >> }; >> >> - cs { >> + cs-pins { >> pins = "gpio8"; >> + function = "gpio"; > > I'm changing this to "gsbi1" while applying this patch. Thanks Bjorn. This was missing in original DTS, so I assumed intention was a GPIO-based CS. I guess SPI-based also makes sense... Best regards, Krzysztof
diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts index 3a484ac53917..9a3a510f88ca 100644 --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts @@ -60,33 +60,32 @@ &gsbi5_serial { }; &msmgpio { - spi1_default: spi1_default { - mux { - pins = "gpio6", "gpio7", "gpio9"; - function = "gsbi1"; - }; - - mosi { + spi1_default: spi1-default-state { + mosi-pins { pins = "gpio6"; + function = "gsbi1"; drive-strength = <12>; bias-disable; }; - miso { + miso-pins { pins = "gpio7"; + function = "gsbi1"; drive-strength = <12>; bias-disable; }; - cs { + cs-pins { pins = "gpio8"; + function = "gpio"; drive-strength = <12>; bias-disable; output-low; }; - clk { + clk-pins { pins = "gpio9"; + function = "gsbi1"; drive-strength = <12>; bias-disable; };