[v2,4/6] arm64: dts: fsd: Add MCAN device node
Commit Message
Add MCAN device node and enable the same for FSD platform.
This also adds the required pin configuration for the same.
Signed-off-by: Sriranjani P <sriranjani.p@samsung.com>
Cc: devicetree@vger.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Vivek Yadav <vivek.2311@samsung.com>
---
arch/arm64/boot/dts/tesla/fsd-evb.dts | 16 +++++
arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 28 +++++++++
arch/arm64/boot/dts/tesla/fsd.dtsi | 68 ++++++++++++++++++++++
3 files changed, 112 insertions(+)
Comments
On 09/11/2022 11:09, Vivek Yadav wrote:
> Add MCAN device node and enable the same for FSD platform.
> This also adds the required pin configuration for the same.
>
> Signed-off-by: Sriranjani P <sriranjani.p@samsung.com>
> Cc: devicetree@vger.kernel.org
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Signed-off-by: Vivek Yadav <vivek.2311@samsung.com>
> ---
> arch/arm64/boot/dts/tesla/fsd-evb.dts | 16 +++++
> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 28 +++++++++
> arch/arm64/boot/dts/tesla/fsd.dtsi | 68 ++++++++++++++++++++++
> 3 files changed, 112 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> index 1db6ddf03f01..af3862e9fe3b 100644
> --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> @@ -34,6 +34,22 @@
> clock-frequency = <24000000>;
> };
>
> +&m_can0 {
> + status = "okay";
> +};
> +
> +&m_can1 {
> + status = "okay";
> +};
> +
> +&m_can2 {
> + status = "okay";
> +};
> +
> +&m_can3 {
> + status = "okay";
> +};
> +
> &serial_0 {
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> index d0abb9aa0e9e..bb5289ebfef3 100644
> --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> @@ -339,6 +339,34 @@
> samsung,pin-pud = <FSD_PIN_PULL_UP>;
> samsung,pin-drv = <FSD_PIN_DRV_LV1>;
> };
> +
> + m_can0_bus: m-can0-bus-pins {
> + samsung,pins = "gpd0-0", "gpd0-1";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> + };
> +
> + m_can1_bus: m-can1-bus-pins {
> + samsung,pins = "gpd0-2", "gpd0-3";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> + };
> +
> + m_can2_bus: m-can2-bus-pins {
> + samsung,pins = "gpd0-4", "gpd0-5";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> + };
> +
> + m_can3_bus: m-can3-bus-pins {
> + samsung,pins = "gpd0-6", "gpd0-7";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> + };
> };
>
> &pinctrl_pmu {
> diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
> index 3d8ebbfc27f4..154fd3fc5895 100644
> --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
> +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
> @@ -765,6 +765,74 @@
> interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> + m_can0: can@14088000 {
> + compatible = "bosch,m_can";
> + reg = <0x0 0x14088000 0x0 0x0200>,
> + <0x0 0x14080000 0x0 0x8000>;
Align with < in line before.
> + reg-names = "m_can", "message_ram";
> + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "int0", "int1";
> + pinctrl-names = "default";
> + pinctrl-0 = <&m_can0_bus>;
> + clocks = <&clock_peric PERIC_MCAN0_IPCLKPORT_PCLK>,
> + <&clock_peric PERIC_MCAN0_IPCLKPORT_CCLK>;
The same (unless it's the problem of diff/patch and these are actually
aligned).
Best regards,
Krzysztof
@@ -34,6 +34,22 @@
clock-frequency = <24000000>;
};
+&m_can0 {
+ status = "okay";
+};
+
+&m_can1 {
+ status = "okay";
+};
+
+&m_can2 {
+ status = "okay";
+};
+
+&m_can3 {
+ status = "okay";
+};
+
&serial_0 {
status = "okay";
};
@@ -339,6 +339,34 @@
samsung,pin-pud = <FSD_PIN_PULL_UP>;
samsung,pin-drv = <FSD_PIN_DRV_LV1>;
};
+
+ m_can0_bus: m-can0-bus-pins {
+ samsung,pins = "gpd0-0", "gpd0-1";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV4>;
+ };
+
+ m_can1_bus: m-can1-bus-pins {
+ samsung,pins = "gpd0-2", "gpd0-3";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV4>;
+ };
+
+ m_can2_bus: m-can2-bus-pins {
+ samsung,pins = "gpd0-4", "gpd0-5";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV4>;
+ };
+
+ m_can3_bus: m-can3-bus-pins {
+ samsung,pins = "gpd0-6", "gpd0-7";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV4>;
+ };
};
&pinctrl_pmu {
@@ -765,6 +765,74 @@
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
};
+ m_can0: can@14088000 {
+ compatible = "bosch,m_can";
+ reg = <0x0 0x14088000 0x0 0x0200>,
+ <0x0 0x14080000 0x0 0x8000>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&m_can0_bus>;
+ clocks = <&clock_peric PERIC_MCAN0_IPCLKPORT_PCLK>,
+ <&clock_peric PERIC_MCAN0_IPCLKPORT_CCLK>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ m_can1: can@14098000 {
+ compatible = "bosch,m_can";
+ reg = <0x0 0x14098000 0x0 0x0200>,
+ <0x0 0x14090000 0x0 0x8000>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&m_can1_bus>;
+ clocks = <&clock_peric PERIC_MCAN1_IPCLKPORT_PCLK>,
+ <&clock_peric PERIC_MCAN1_IPCLKPORT_CCLK>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ m_can2: can@140a8000 {
+ compatible = "bosch,m_can";
+ reg = <0x0 0x140a8000 0x0 0x0200>,
+ <0x0 0x140a0000 0x0 0x8000>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&m_can2_bus>;
+ clocks = <&clock_peric PERIC_MCAN2_IPCLKPORT_PCLK>,
+ <&clock_peric PERIC_MCAN2_IPCLKPORT_CCLK>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ m_can3: can@140b8000 {
+ compatible = "bosch,m_can";
+ reg = <0x0 0x140b8000 0x0 0x0200>,
+ <0x0 0x140b0000 0x0 0x8000>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&m_can3_bus>;
+ clocks = <&clock_peric PERIC_MCAN3_IPCLKPORT_PCLK>,
+ <&clock_peric PERIC_MCAN3_IPCLKPORT_CCLK>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
spi_0: spi@14140000 {
compatible = "tesla,fsd-spi";
reg = <0x0 0x14140000 0x0 0x100>;