From patchwork Tue Nov 8 10:12:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sit, Michael Wei Hong" X-Patchwork-Id: 16972 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2611355wru; Tue, 8 Nov 2022 02:19:21 -0800 (PST) X-Google-Smtp-Source: AMsMyM644VWFp4UhPazs+160m+gnLh2fC/exyAYS+px4SZmecG5TiLpInS0Lm5UxTejXoTD5EWHh X-Received: by 2002:a50:ee0a:0:b0:463:4055:9db4 with SMTP id g10-20020a50ee0a000000b0046340559db4mr49382233eds.421.1667902761415; Tue, 08 Nov 2022 02:19:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1667902761; cv=none; d=google.com; s=arc-20160816; b=nEyoCE67ytfZAq5mK+kkxdZJpy+qwdIidb88cn+i2/c+DjaoqT4zAgHvAdMO7obw0Z NWKkLuIQ36WCUoLE8pd4lCkohJ3lzQqhlpOyRn1QsP/ZyKZFCbbP8gqXIrk7p6DiVVnC m1GriheMyI7yKNl4sX9fhSPil21qoOrLps12IIsXM88IeNMGVkNV58Dn+2iBy7mmHsDP 6N35mhD4GCsmvWerjfqzmbrUBytBvVXBR+BFEZ6w/xciAfyjvXbuUf3COAIdlj8jbrOK b7tYDIkbC3whDTPSyh0x0RqbXeOVJrTJF7mCV4iqyDP3PfO7ptyOqRMw8ny2p75YS03D aW4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=NI9U+FLqpuWdQ6VC5auBdOcPK0h/XreHVBskS4c1b2Y=; b=e3yG/GL4+eDYKe7uVvNvi47Z0gFrxmzP74xEqa7x69ALYZZlxr6P97UoFpTIcOiPLr +q96vmHrWh+RoY7Vu5H2oRHNfiglHCCSjyFQXFNsojlv8Ir+9UqnPiD334966gHN16QH ImsrHUnud2MeqR3797wzUkv5l26OuZ+9U9wsBMO9sPymjUvjsgcm4zlzRl7oMD1JfWIe pJb2QaH2hoZlQ9GXMoIwJjubq3mJKIsLFr/NbcsUD97oEfN3bfAf8toubq83NtS7Eoia ZdKuM7Y8TeBSUMCDDuyaR81xjtC5UHrqpzPzTXPSILvav4vp4ATh4bMQloNNuStHNUow 3jeg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="XLlEYi/W"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w5-20020a170906d20500b0078def5c29e6si10338257ejz.531.2022.11.08.02.18.58; Tue, 08 Nov 2022 02:19:21 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="XLlEYi/W"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233810AbiKHKNQ (ORCPT + 99 others); Tue, 8 Nov 2022 05:13:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43418 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233798AbiKHKNO (ORCPT ); Tue, 8 Nov 2022 05:13:14 -0500 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BECF2CDE9; Tue, 8 Nov 2022 02:13:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667902391; x=1699438391; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=Q+z4Oczh9hybhrEfvobDCOfiNnJPSLx3QrNRxzi8Isk=; b=XLlEYi/WA9Nlvsn+91rXrpUdgPnf/JNXTQy5wChCcOlh/R/p2ctRTYt1 MfVv5uKCzkmkFN+4Brr91FrLq4+HjW9hPCerbetUJPtfOy9KO6ASqAJiM QPQPDI5BeyZOKNQGWNQlCeOpsht5KC58rmJHR7ad4Sv7qv6EjqhTniUYU 27dksRwQj6nj/942/lyDSBvDlheRm13qDsgGar27IJpioDOLef6/XU0zQ +kx/0uBPBNnZHmhgwa6rxqxn8zOoLsU6WA7tVHaO5zADc9RfQEhAV9c6L vGAtqeDbveNdHbRA8blRh0X3GoGL30wbIYohnRAHfYAIP0mc+zkbRQGhq g==; X-IronPort-AV: E=McAfee;i="6500,9779,10524"; a="372801825" X-IronPort-AV: E=Sophos;i="5.96,147,1665471600"; d="scan'208";a="372801825" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Nov 2022 02:13:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10524"; a="881463548" X-IronPort-AV: E=Sophos;i="5.96,147,1665471600"; d="scan'208";a="881463548" Received: from mike-ilbpg1.png.intel.com ([10.88.227.76]) by fmsmga006.fm.intel.com with ESMTP; 08 Nov 2022 02:13:07 -0800 From: Michael Sit Wei Hong To: Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Looi Hong Aun , Voon Weifeng , Tan Tee Min , Zulkifli Muhammad Husaini , Gan Yi Fang Subject: [PATCH net 1/1] net: phy: dp83867: Fix SGMII FIFO depth for non OF devices Date: Tue, 8 Nov 2022 18:12:18 +0800 Message-Id: <20221108101218.612499-1-michael.wei.hong.sit@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=AC_FROM_MANY_DOTS,BAYES_00, DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748922805738718941?= X-GMAIL-MSGID: =?utf-8?q?1748922805738718941?= Current driver code will read device tree node information, and set default values if there is no info provided. This is not done in non-OF devices leading to SGMII fifo depths being set to the smallest size. This patch sets the value to the default value of the PHY as stated in the PHY datasheet. Signed-off-by: Michael Sit Wei Hong Reviewed-by: Andrew Lunn --- drivers/net/phy/dp83867.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 6939563d3b7c..fb7df4baaf6f 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -682,6 +682,13 @@ static int dp83867_of_init(struct phy_device *phydev) */ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN / 2; + /* For non-OF device, the RX and TX FIFO depths are taken from + * default value. So, we init RX & TX FIFO depths here + * so that it is configured correctly later in dp83867_config_init(); + */ + dp83867->tx_fifo_depth = DP83867_PHYCR_FIFO_DEPTH_4_B_NIB; + dp83867->rx_fifo_depth = DP83867_PHYCR_FIFO_DEPTH_4_B_NIB; + return 0; } #endif /* CONFIG_OF_MDIO */