diff mbox series

[3/3] dmaengine: idxd: Add descriptor definitions for translation fetch operation

Message ID 20221108003944.2095567-4-fenghua.yu@intel.com
State New
Headers
Series Add descriptor definitions for a few new DSA operations |

Commit Message

Fenghua Yu Nov. 8, 2022, 12:39 a.m. UTC 
  The translation fetch operation (0x0A) fetches address translations for the
address range specified in the decriptor by issuing address translation
(ATS) requests to the IOMMU.

Add descriptor definitions for the operation so that user can use DSA
to accelerate translation fetch.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
---
 include/uapi/linux/idxd.h | 9 +++++++++
 1 file changed, 9 insertions(+)
diff mbox series

Patch

diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h
index 34294d99c1cb..9de48c561452 100644
--- a/include/uapi/linux/idxd.h
+++ b/include/uapi/linux/idxd.h
@@ -71,6 +71,7 @@  enum dsa_opcode {
 	DSA_OPCODE_CR_DELTA,
 	DSA_OPCODE_AP_DELTA,
 	DSA_OPCODE_DUALCAST,
+	DSA_OPCODE_TRANSL_FETCH,
 	DSA_OPCODE_CRCGEN = 0x10,
 	DSA_OPCODE_COPY_CRC,
 	DSA_OPCODE_DIF_CHECK,
@@ -181,6 +182,7 @@  struct dsa_hw_desc {
 		uint64_t	pattern;
 		uint64_t	desc_list_addr;
 		uint64_t	pattern_lower;
+		uint64_t	transl_fetch_addr;
 	};
 	union {
 		uint64_t	dst_addr;
@@ -191,6 +193,7 @@  struct dsa_hw_desc {
 	union {
 		uint32_t	xfer_size;
 		uint32_t	desc_count;
+		uint32_t	region_size;
 	};
 	uint16_t	int_handle;
 	uint16_t	rsvd1;
@@ -250,6 +253,12 @@  struct dsa_hw_desc {
 			uint64_t	pattern_upper;
 		};
 
+		/* Translation fetch */
+		struct {
+			uint64_t	transl_fetch_res;
+			uint32_t	region_stride;
+		};
+
 		/* DIX generate */
 		struct {
 			uint8_t		dix_gen_res;