diff mbox series

[v2,04/23] arm64: dts: Update cache properties for apm

Message ID 20221107155825.1644604-5-pierre.gondois@arm.com
State New
Headers
Series Update cache properties for arm64 DTS |

Commit Message

Pierre Gondois Nov. 7, 2022, 3:56 p.m. UTC 
  The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).

Update the Device Trees accordingly.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
---
 arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 4 ++++
 arch/arm64/boot/dts/apm/apm-storm.dtsi     | 4 ++++
 2 files changed, 8 insertions(+)

Comments

Pierre Gondois Jan. 12, 2023, 8:33 a.m. UTC | #1 
(subset for cc list)
Hello,
Just a reminder in case the patch was forgotten,
Regards,
Pierre

On 11/7/22 16:56, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
> The 'cache-unified' property should be present if one of the
> properties for unified cache is present ('cache-size', ...).
> 
> Update the Device Trees accordingly.
> 
> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
> ---
>   arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 4 ++++
>   arch/arm64/boot/dts/apm/apm-storm.dtsi     | 4 ++++
>   2 files changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
> index a8526f8157ec..68ba865fcd58 100644
> --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
> +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
> @@ -97,15 +97,19 @@ cpu@301 {
>   		};
>   		xgene_L2_0: l2-cache-0 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_1: l2-cache-1 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_2: l2-cache-2 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_3: l2-cache-3 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
> index f56d687f772d..9ac7417f65eb 100644
> --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
> +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
> @@ -81,15 +81,19 @@ cpu@301 {
>   		};
>   		xgene_L2_0: l2-cache-0 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_1: l2-cache-1 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_2: l2-cache-2 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_3: l2-cache-3 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   	};
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
index a8526f8157ec..68ba865fcd58 100644
--- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
@@ -97,15 +97,19 @@  cpu@301 {
 		};
 		xgene_L2_0: l2-cache-0 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 		xgene_L2_1: l2-cache-1 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 		xgene_L2_2: l2-cache-2 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 		xgene_L2_3: l2-cache-3 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index f56d687f772d..9ac7417f65eb 100644
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -81,15 +81,19 @@  cpu@301 {
 		};
 		xgene_L2_0: l2-cache-0 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 		xgene_L2_1: l2-cache-1 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 		xgene_L2_2: l2-cache-2 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 		xgene_L2_3: l2-cache-3 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 	};