[v2,03/23] arm64: dts: Update cache properties for amlogic
Commit Message
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 1 +
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 1 +
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 1 +
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 1 +
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 1 +
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 1 +
6 files changed, 6 insertions(+)
@@ -36,6 +36,7 @@ cpu1: cpu@1 {
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -105,6 +105,7 @@ cpu3: cpu@3 {
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -50,6 +50,7 @@ cpu3: cpu@3 {
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -105,6 +105,7 @@ cpu103: cpu@103 {
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
};
@@ -132,6 +132,7 @@ cpu3: cpu@3 {
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -88,6 +88,7 @@ cpu3: cpu@3 {
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};