Message ID | 20221107155825.1644604-11-pierre.gondois@arm.com |
---|---|
State | New |
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linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 10/23] arm64: dts: Update cache properties for lg Date: Mon, 7 Nov 2022 16:57:03 +0100 Message-Id: <20221107155825.1644604-11-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221107155825.1644604-1-pierre.gondois@arm.com> References: <20221107155825.1644604-1-pierre.gondois@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: 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Series |
Update cache properties for arm64 DTS
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Commit Message
Pierre Gondois
Nov. 7, 2022, 3:57 p.m. UTC
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
---
arch/arm64/boot/dts/lg/lg1312.dtsi | 1 +
arch/arm64/boot/dts/lg/lg1313.dtsi | 1 +
2 files changed, 2 insertions(+)
Comments
(subset for cc list) Hello, Just a reminder in case the patch was forgotten, Regards, Pierre On 11/7/22 16:57, Pierre Gondois wrote: > The DeviceTree Specification v0.3 specifies that the cache node > 'compatible' and 'cache-level' properties are 'required'. Cf. > s3.8 Multi-level and Shared Cache Nodes > The 'cache-unified' property should be present if one of the > properties for unified cache is present ('cache-size', ...). > > Update the Device Trees accordingly. > > Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> > --- > arch/arm64/boot/dts/lg/lg1312.dtsi | 1 + > arch/arm64/boot/dts/lg/lg1313.dtsi | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi > index 78ae73d0cf36..25ed9aeee2dc 100644 > --- a/arch/arm64/boot/dts/lg/lg1312.dtsi > +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi > @@ -48,6 +48,7 @@ cpu3: cpu@3 { > }; > L2_0: l2-cache0 { > compatible = "cache"; > + cache-level = <2>; > }; > }; > > diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi > index 2173316573be..db82fd4cc759 100644 > --- a/arch/arm64/boot/dts/lg/lg1313.dtsi > +++ b/arch/arm64/boot/dts/lg/lg1313.dtsi > @@ -48,6 +48,7 @@ cpu3: cpu@3 { > }; > L2_0: l2-cache0 { > compatible = "cache"; > + cache-level = <2>; > }; > }; >
23. 1. 12. 오후 5:34에 Pierre Gondois 이(가) 쓴 글: > (subset for cc list) > Hello, > Just a reminder in case the patch was forgotten, > Regards, > Pierre > > On 11/7/22 16:57, Pierre Gondois wrote: >> The DeviceTree Specification v0.3 specifies that the cache node >> 'compatible' and 'cache-level' properties are 'required'. Cf. >> s3.8 Multi-level and Shared Cache Nodes >> The 'cache-unified' property should be present if one of the >> properties for unified cache is present ('cache-size', ...). >> >> Update the Device Trees accordingly. >> >> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Chanho Min <chanho.min@lge.com> >> --- >> arch/arm64/boot/dts/lg/lg1312.dtsi | 1 + >> arch/arm64/boot/dts/lg/lg1313.dtsi | 1 + >> 2 files changed, 2 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi >> b/arch/arm64/boot/dts/lg/lg1312.dtsi >> index 78ae73d0cf36..25ed9aeee2dc 100644 >> --- a/arch/arm64/boot/dts/lg/lg1312.dtsi >> +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi >> @@ -48,6 +48,7 @@ cpu3: cpu@3 { >> }; >> L2_0: l2-cache0 { >> compatible = "cache"; >> + cache-level = <2>; >> }; >> }; >> diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi >> b/arch/arm64/boot/dts/lg/lg1313.dtsi >> index 2173316573be..db82fd4cc759 100644 >> --- a/arch/arm64/boot/dts/lg/lg1313.dtsi >> +++ b/arch/arm64/boot/dts/lg/lg1313.dtsi >> @@ -48,6 +48,7 @@ cpu3: cpu@3 { >> }; >> L2_0: l2-cache0 {Re: Re: [PATCH v2 10/23] arm64: dts: Update cache properties for lg >> compatible = "cache"; >> + cache-leveRe: Re: [PATCH v2 10/23] arm64: dts: Update cache properties for lgl = <2>; >> }; >> };
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi index 78ae73d0cf36..25ed9aeee2dc 100644 --- a/arch/arm64/boot/dts/lg/lg1312.dtsi +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi @@ -48,6 +48,7 @@ cpu3: cpu@3 { }; L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi index 2173316573be..db82fd4cc759 100644 --- a/arch/arm64/boot/dts/lg/lg1313.dtsi +++ b/arch/arm64/boot/dts/lg/lg1313.dtsi @@ -48,6 +48,7 @@ cpu3: cpu@3 { }; L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; }; };