Message ID | 20221104152311.1098603-4-jneanne@baylibre.com |
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State | New |
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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id l41-20020a05600c08a900b003b4935f04a4sm3689764wmp.5.2022.11.04.08.23.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Nov 2022 08:23:31 -0700 (PDT) From: Jerome Neanne <jneanne@baylibre.com> To: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, nm@ti.com, kristo@kernel.org, dmitry.torokhov@gmail.com, krzysztof.kozlowski+dt@linaro.org, catalin.marinas@arm.com, will@kernel.org, lee@kernel.org, tony@atomide.com, vigneshr@ti.com, shawnguo@kernel.org, geert+renesas@glider.be, dmitry.baryshkov@linaro.org, marcel.ziswiler@toradex.com, vkoul@kernel.org, biju.das.jz@bp.renesas.com, arnd@arndb.de, jeff@labundy.com Cc: afd@ti.com, khilman@baylibre.com, narmstrong@baylibre.com, msp@baylibre.com, j-keerthy@ti.com, jneanne@baylibre.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH v7 3/6] DONOTMERGE: arm64: dts: ti: k3-am642-sk: Enable tps65219 power-button Date: Fri, 4 Nov 2022 16:23:08 +0100 Message-Id: <20221104152311.1098603-4-jneanne@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221104152311.1098603-1-jneanne@baylibre.com> References: <20221104152311.1098603-1-jneanne@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748579806209631955?= X-GMAIL-MSGID: =?utf-8?q?1748579806209631955?= |
Series |
Add support for TI TPS65219 PMIC.
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Commit Message
jerome Neanne
Nov. 4, 2022, 3:23 p.m. UTC
This board uses the pin as a power-button, enable it. Needed for driver testing but official board support pending. TI commitment is required before board upstream kick-off. Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Signed-off-by: Jerome Neanne <jneanne@baylibre.com> --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 441bc746bda0..052a3fbc8a4f 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -431,6 +431,7 @@ tps65219: pmic@30 { pinctrl-0 = <&pmic_irq_pins_default>; interrupt-parent = <&gic500>; interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; + ti,power-button; buck1-supply = <&vcc_3v3_sys>; buck2-supply = <&vcc_3v3_sys>;