diff mbox series

[v7,1/2] arm64: dts: ti: k3-j721e-main: Add dts nodes for EHRPWMs

Message ID 20221103174743.16827-2-r-ravikumar@ti.com
State New
Headers
Series Enable RPi header on j721e sk |

Commit Message

Rahul T R Nov. 3, 2022, 5:47 p.m. UTC 
  From: Vijay Pothukuchi <vijayp@ti.com>

Add dts nodes for 6 EHRPWM instances on SoC

Signed-off-by: Vijay Pothukuchi <vijayp@ti.com>
Signed-off-by: Rahul T R <r-ravikumar@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 68 ++++++++++++++++++++++-
 1 file changed, 67 insertions(+), 1 deletion(-)

Comments

Nishanth Menon Nov. 3, 2022, 9:53 p.m. UTC | #1 
On 23:17-20221103, Rahul T R wrote:
> From: Vijay Pothukuchi <vijayp@ti.com>
> 
> Add dts nodes for 6 EHRPWM instances on SoC

OK - I  am able to understand why you'd want this to be disabled because
I have the background, however, the intent of a commit message is to
provide information to folks who is not me.

To give you a guidance, please see how Andrew has done
in https://lore.kernel.org/linux-arm-kernel/20221028142417.10642-10-afd@ti.com/

You are permitted to disable, but you need to provide explanation why
you are choosing to do that by default.

> 
> Signed-off-by: Vijay Pothukuchi <vijayp@ti.com>
> Signed-off-by: Rahul T R <r-ravikumar@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 68 ++++++++++++++++++++++-
>  1 file changed, 67 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index 5c4a0e28cde5..bc3146e24816 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -66,7 +66,73 @@ usb_serdes_mux: mux-controller@4000 {
>  			#mux-control-cells = <1>;
>  			mux-reg-masks = <0x4000 0x8000000>, /* USB0 to SERDES0/3 mux */
>  					<0x4010 0x8000000>; /* USB1 to SERDES1/2 mux */
> -	    };
> +		};
> +
> +		ehrpwm_tbclk: clock-controller@4140 {
> +			compatible = "ti,am654-ehrpwm-tbclk", "syscon";
> +			reg = <0x4140 0x18>;
> +			#clock-cells = <1>;
> +		};
> +	};
> +
> +	main_ehrpwm0: pwm@3000000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3000000 0x00 0x100>;
> +		power-domains = <&k3_pds 83 TI_SCI_PD_EXCLUSIVE>;
> +		clocks = <&ehrpwm_tbclk 0>, <&k3_clks 83 0>;
> +		clock-names = "tbclk", "fck";
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm1: pwm@3010000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3010000 0x00 0x100>;
> +		power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>;
> +		clocks = <&ehrpwm_tbclk 1>, <&k3_clks 84 0>;
> +		clock-names = "tbclk", "fck";
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm2: pwm@3020000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3020000 0x00 0x100>;
> +		power-domains = <&k3_pds 85 TI_SCI_PD_EXCLUSIVE>;
> +		clocks = <&ehrpwm_tbclk 2>, <&k3_clks 85 0>;
> +		clock-names = "tbclk", "fck";
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm3: pwm@3030000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3030000 0x00 0x100>;
> +		power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
> +		clocks = <&ehrpwm_tbclk 3>, <&k3_clks 86 0>;
> +		clock-names = "tbclk", "fck";
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm4: pwm@3040000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3040000 0x00 0x100>;
> +		power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
> +		clocks = <&ehrpwm_tbclk 4>, <&k3_clks 87 0>;
> +		clock-names = "tbclk", "fck";
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm5: pwm@3050000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3050000 0x00 0x100>;
> +		power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
> +		clocks = <&ehrpwm_tbclk 5>, <&k3_clks 88 0>;
> +		clock-names = "tbclk", "fck";
> +		status = "disabled";
>  	};
>  
>  	gic500: interrupt-controller@1800000 {
> -- 
> 2.38.0
>
Rahul T R Nov. 4, 2022, 5:08 a.m. UTC | #2 
Hi Nishanth,

On 16:53-20221103, Nishanth Menon wrote:
> On 23:17-20221103, Rahul T R wrote:
> > From: Vijay Pothukuchi <vijayp@ti.com>
> > 
> > Add dts nodes for 6 EHRPWM instances on SoC
> 
> OK - I  am able to understand why you'd want this to be disabled because
> I have the background, however, the intent of a commit message is to
> provide information to folks who is not me.
> 
> To give you a guidance, please see how Andrew has done
> in https://lore.kernel.org/linux-arm-kernel/20221028142417.10642-10-afd@ti.com/
> 
> You are permitted to disable, but you need to provide explanation why
> you are choosing to do that by default.
> 

will add the explanation in the
commit message and resend this

Regards
Rahul T R

> > 
> > Signed-off-by: Vijay Pothukuchi <vijayp@ti.com>
> > Signed-off-by: Rahul T R <r-ravikumar@ti.com>
> > ---
> >  arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 68 ++++++++++++++++++++++-
> >  1 file changed, 67 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> > index 5c4a0e28cde5..bc3146e24816 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> > @@ -66,7 +66,73 @@ usb_serdes_mux: mux-controller@4000 {
> >  			#mux-control-cells = <1>;
> >  			mux-reg-masks = <0x4000 0x8000000>, /* USB0 to SERDES0/3 mux */
> >  					<0x4010 0x8000000>; /* USB1 to SERDES1/2 mux */
> > -	    };
> > +		};
> > +
> > +		ehrpwm_tbclk: clock-controller@4140 {
> > +			compatible = "ti,am654-ehrpwm-tbclk", "syscon";
> > +			reg = <0x4140 0x18>;
> > +			#clock-cells = <1>;
> > +		};
> > +	};
> > +
> > +	main_ehrpwm0: pwm@3000000 {
> > +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> > +		#pwm-cells = <3>;
> > +		reg = <0x00 0x3000000 0x00 0x100>;
> > +		power-domains = <&k3_pds 83 TI_SCI_PD_EXCLUSIVE>;
> > +		clocks = <&ehrpwm_tbclk 0>, <&k3_clks 83 0>;
> > +		clock-names = "tbclk", "fck";
> > +		status = "disabled";
> > +	};
> > +
> > +	main_ehrpwm1: pwm@3010000 {
> > +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> > +		#pwm-cells = <3>;
> > +		reg = <0x00 0x3010000 0x00 0x100>;
> > +		power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>;
> > +		clocks = <&ehrpwm_tbclk 1>, <&k3_clks 84 0>;
> > +		clock-names = "tbclk", "fck";
> > +		status = "disabled";
> > +	};
> > +
> > +	main_ehrpwm2: pwm@3020000 {
> > +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> > +		#pwm-cells = <3>;
> > +		reg = <0x00 0x3020000 0x00 0x100>;
> > +		power-domains = <&k3_pds 85 TI_SCI_PD_EXCLUSIVE>;
> > +		clocks = <&ehrpwm_tbclk 2>, <&k3_clks 85 0>;
> > +		clock-names = "tbclk", "fck";
> > +		status = "disabled";
> > +	};
> > +
> > +	main_ehrpwm3: pwm@3030000 {
> > +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> > +		#pwm-cells = <3>;
> > +		reg = <0x00 0x3030000 0x00 0x100>;
> > +		power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
> > +		clocks = <&ehrpwm_tbclk 3>, <&k3_clks 86 0>;
> > +		clock-names = "tbclk", "fck";
> > +		status = "disabled";
> > +	};
> > +
> > +	main_ehrpwm4: pwm@3040000 {
> > +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> > +		#pwm-cells = <3>;
> > +		reg = <0x00 0x3040000 0x00 0x100>;
> > +		power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
> > +		clocks = <&ehrpwm_tbclk 4>, <&k3_clks 87 0>;
> > +		clock-names = "tbclk", "fck";
> > +		status = "disabled";
> > +	};
> > +
> > +	main_ehrpwm5: pwm@3050000 {
> > +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> > +		#pwm-cells = <3>;
> > +		reg = <0x00 0x3050000 0x00 0x100>;
> > +		power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
> > +		clocks = <&ehrpwm_tbclk 5>, <&k3_clks 88 0>;
> > +		clock-names = "tbclk", "fck";
> > +		status = "disabled";
> >  	};
> >  
> >  	gic500: interrupt-controller@1800000 {
> > -- 
> > 2.38.0
> > 
> 
> -- 
> Regards,
> Nishanth Menon
> Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 5c4a0e28cde5..bc3146e24816 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -66,7 +66,73 @@  usb_serdes_mux: mux-controller@4000 {
 			#mux-control-cells = <1>;
 			mux-reg-masks = <0x4000 0x8000000>, /* USB0 to SERDES0/3 mux */
 					<0x4010 0x8000000>; /* USB1 to SERDES1/2 mux */
-	    };
+		};
+
+		ehrpwm_tbclk: clock-controller@4140 {
+			compatible = "ti,am654-ehrpwm-tbclk", "syscon";
+			reg = <0x4140 0x18>;
+			#clock-cells = <1>;
+		};
+	};
+
+	main_ehrpwm0: pwm@3000000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3000000 0x00 0x100>;
+		power-domains = <&k3_pds 83 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&ehrpwm_tbclk 0>, <&k3_clks 83 0>;
+		clock-names = "tbclk", "fck";
+		status = "disabled";
+	};
+
+	main_ehrpwm1: pwm@3010000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3010000 0x00 0x100>;
+		power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&ehrpwm_tbclk 1>, <&k3_clks 84 0>;
+		clock-names = "tbclk", "fck";
+		status = "disabled";
+	};
+
+	main_ehrpwm2: pwm@3020000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3020000 0x00 0x100>;
+		power-domains = <&k3_pds 85 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&ehrpwm_tbclk 2>, <&k3_clks 85 0>;
+		clock-names = "tbclk", "fck";
+		status = "disabled";
+	};
+
+	main_ehrpwm3: pwm@3030000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3030000 0x00 0x100>;
+		power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&ehrpwm_tbclk 3>, <&k3_clks 86 0>;
+		clock-names = "tbclk", "fck";
+		status = "disabled";
+	};
+
+	main_ehrpwm4: pwm@3040000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3040000 0x00 0x100>;
+		power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&ehrpwm_tbclk 4>, <&k3_clks 87 0>;
+		clock-names = "tbclk", "fck";
+		status = "disabled";
+	};
+
+	main_ehrpwm5: pwm@3050000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3050000 0x00 0x100>;
+		power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&ehrpwm_tbclk 5>, <&k3_clks 88 0>;
+		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 
 	gic500: interrupt-controller@1800000 {