From patchwork Thu Nov 3 16:46:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 15023 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp648205wru; Thu, 3 Nov 2022 09:54:28 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6Js0akCU0JlSEH/NV9HYU0HpBvpdE1gXoYq44p03VAx/ZBNq52LiuJ4cItlz804tcoFUsh X-Received: by 2002:aa7:8687:0:b0:560:3299:a6c0 with SMTP id d7-20020aa78687000000b005603299a6c0mr31365247pfo.81.1667494468311; Thu, 03 Nov 2022 09:54:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667494468; cv=none; d=google.com; s=arc-20160816; b=Bj0zc30uMCEnXP0ggvXXUctmhghsS7ZUTmHPqWTtOgnvOT4PH3HgN7yiY2Oy1XNixE V+Bes4HaHHLR54MzinVv7BdQ5ER6lt6cC2ja1kfwxpNZ67QflUQ3DCnWuFCLmfPaf8vq g/2732hg9ng/Y2XGOCL5x4OlLo7EEsfc5MTQJ+8H/oklxj2y4B6jEgQpJ6OHJtXnjZNu 4xbYl5zblTw4yFPXTmFp7BspVucS48vMpOmu1diCG0aFvvyu0V2e/AzoBRz28OPaIh2Y nDryH2eI4lup6OdvkJwSEpNSC1zTQfes5B9HiQPoAiYPUFjC69vWa6AQ/FPUI6yFegDB 60Nw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rf/Mt6oEbiMyExw3WJAgLVObcy3VwRrNHZNM0ZSdZuk=; b=F0JRpJEkevURqX8++5d7XWC5hLK5abgZoKTl5nWkyTH/bitFr/HhlR9NgDR43KCGFo xaZyyBwbkZ/jKaFW3/thGEpus7dXHkl571+B5S+4jo730l7lACc6qqiInDOxK9tYGL7B CXoCIfQi66gAKUUt7bGUXwWl1VGuaNjIoEdayo9QBQcIbMW5aD8KX+cnsReP+tzoT8Yg YFIdF1Y908AC/yyL4ABj8v1GjH9lkofqRHNQoCCnrNSBvtKUhIJOd4kGadk++JBSahP8 MDRjC0o4RNZA5O2alSxq53JTBL2eiMvghdCAjTG8prl34DBhq+iaJo8VMBQLR9esLl74 3NRw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=lO7TO6Jp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u22-20020a056a00159600b0056be3585c3asi1406462pfk.266.2022.11.03.09.54.12; Thu, 03 Nov 2022 09:54:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=lO7TO6Jp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232007AbiKCQrw (ORCPT + 99 others); Thu, 3 Nov 2022 12:47:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45820 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232533AbiKCQrL (ORCPT ); Thu, 3 Nov 2022 12:47:11 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D23F119C36; Thu, 3 Nov 2022 09:46:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667493997; x=1699029997; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=S2RJPvl3baq0S1jZ0H3vH8ZxE7YEfK7nHVPBJ+ytMMo=; b=lO7TO6JpEQmdte24eS13Rj4ZhkG5XSLR2S3dsQoATCqQxjND3mn7ZvBD EtjUhfRE8GUISw6ClCiv1GCPQIRMRj2UPATGvolTW5z236mk/P/YWf8sl m3aoWczVvuaggh18no5pQ6zwt8JhRfT+L5mkOdum7dwjeT5HO1pZ1WvLZ U7gtZjhSzJXVpcNEzU8eaayVeQsR+DKskp1joqzR1cbkrETuZr3YwHM5U eLs4vt9vw4+AzB/ZTIxwDxqdgj5NQ/ya1Bwo8zbRhI3u5LciN5Sd35h7J e5tGPzIXOZhot/ZdJPeDYfvaLdKP/WZDDlU4AQnmiVXbbFb/dqzFMTCvX Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10520"; a="373970816" X-IronPort-AV: E=Sophos;i="5.96,134,1665471600"; d="scan'208";a="373970816" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Nov 2022 09:46:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10520"; a="629408025" X-IronPort-AV: E=Sophos;i="5.96,134,1665471600"; d="scan'208";a="629408025" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 03 Nov 2022 09:46:29 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id AA5DF1E5; Thu, 3 Nov 2022 18:46:52 +0200 (EET) From: Andy Shevchenko To: =?utf-8?q?Micka=C3=ABl_Sala=C3=BCn?= , Andy Shevchenko , Mika Westerberg , Michael Ellerman , Arnd Bergmann , Bjorn Helgaas , "Rafael J. Wysocki" , Juergen Gross , Dominik Brodowski , linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, linux-pci@vger.kernel.org, xen-devel@lists.xenproject.org Cc: Miguel Ojeda , Richard Henderson , Ivan Kokshaysky , Matt Turner , Russell King , Thomas Bogendoerfer , Nicholas Piggin , Christophe Leroy , "David S. Miller" , Bjorn Helgaas , Stefano Stabellini , Oleksandr Tyshchenko Subject: [PATCH v2 2/4] PCI: Split pci_bus_for_each_resource_p() out of pci_bus_for_each_resource() Date: Thu, 3 Nov 2022 18:46:42 +0200 Message-Id: <20221103164644.70554-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221103164644.70554-1-andriy.shevchenko@linux.intel.com> References: <20221103164644.70554-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748494679609812019?= X-GMAIL-MSGID: =?utf-8?q?1748494679609812019?= Refactor pci_bus_for_each_resource() in the same way as it's done in pci_dev_for_each_resource() case. This will allow to hide iterator inside the loop, where it's not used otherwise. No functional changes intended. Signed-off-by: Andy Shevchenko --- .clang-format | 1 + drivers/pci/bus.c | 7 +++---- drivers/pci/hotplug/shpchp_sysfs.c | 8 ++++---- drivers/pci/pci.c | 5 ++--- drivers/pci/probe.c | 2 +- drivers/pci/setup-bus.c | 10 ++++------ include/linux/pci.h | 14 ++++++++++---- 7 files changed, 25 insertions(+), 22 deletions(-) diff --git a/.clang-format b/.clang-format index 08d579fea6cf..b61fd8791346 100644 --- a/.clang-format +++ b/.clang-format @@ -520,6 +520,7 @@ ForEachMacros: - 'of_property_for_each_string' - 'of_property_for_each_u32' - 'pci_bus_for_each_resource' + - 'pci_bus_for_each_resource_p' - 'pci_dev_for_each_resource' - 'pci_dev_for_each_resource_p' - 'pci_doe_for_each_off' diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 3cef835b375f..fc8e9c11c5f2 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -161,13 +161,13 @@ static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res, void *alignf_data, struct pci_bus_region *region) { - int i, ret; struct resource *r, avail; resource_size_t max; + int ret; type_mask |= IORESOURCE_TYPE_BITS; - pci_bus_for_each_resource(bus, r, i) { + pci_bus_for_each_resource_p(bus, r) { resource_size_t min_used = min; if (!r) @@ -264,9 +264,8 @@ bool pci_bus_clip_resource(struct pci_dev *dev, int idx) struct resource *res = &dev->resource[idx]; struct resource orig_res = *res; struct resource *r; - int i; - pci_bus_for_each_resource(bus, r, i) { + pci_bus_for_each_resource_p(bus, r) { resource_size_t start, end; if (!r) diff --git a/drivers/pci/hotplug/shpchp_sysfs.c b/drivers/pci/hotplug/shpchp_sysfs.c index 64beed7a26be..ff04f0c5e7c3 100644 --- a/drivers/pci/hotplug/shpchp_sysfs.c +++ b/drivers/pci/hotplug/shpchp_sysfs.c @@ -24,16 +24,16 @@ static ssize_t show_ctrl(struct device *dev, struct device_attribute *attr, char *buf) { struct pci_dev *pdev; - int index, busnr; struct resource *res; struct pci_bus *bus; size_t len = 0; + int busnr; pdev = to_pci_dev(dev); bus = pdev->subordinate; len += sysfs_emit_at(buf, len, "Free resources: memory\n"); - pci_bus_for_each_resource(bus, res, index) { + pci_bus_for_each_resource_p(bus, res) { if (res && (res->flags & IORESOURCE_MEM) && !(res->flags & IORESOURCE_PREFETCH)) { len += sysfs_emit_at(buf, len, @@ -43,7 +43,7 @@ static ssize_t show_ctrl(struct device *dev, struct device_attribute *attr, char } } len += sysfs_emit_at(buf, len, "Free resources: prefetchable memory\n"); - pci_bus_for_each_resource(bus, res, index) { + pci_bus_for_each_resource_p(bus, res) { if (res && (res->flags & IORESOURCE_MEM) && (res->flags & IORESOURCE_PREFETCH)) { len += sysfs_emit_at(buf, len, @@ -53,7 +53,7 @@ static ssize_t show_ctrl(struct device *dev, struct device_attribute *attr, char } } len += sysfs_emit_at(buf, len, "Free resources: IO\n"); - pci_bus_for_each_resource(bus, res, index) { + pci_bus_for_each_resource_p(bus, res) { if (res && (res->flags & IORESOURCE_IO)) { len += sysfs_emit_at(buf, len, "start = %8.8llx, length = %8.8llx\n", diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 2127aba3550b..ff5b34337dab 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -782,9 +782,8 @@ struct resource *pci_find_parent_resource(const struct pci_dev *dev, { const struct pci_bus *bus = dev->bus; struct resource *r; - int i; - pci_bus_for_each_resource(bus, r, i) { + pci_bus_for_each_resource_p(bus, r) { if (!r) continue; if (resource_contains(r, res)) { @@ -802,7 +801,7 @@ struct resource *pci_find_parent_resource(const struct pci_dev *dev, * be both a positively-decoded aperture and a * subtractively-decoded region that contain the BAR. * We want the positively-decoded one, so this depends - * on pci_bus_for_each_resource() giving us those + * on pci_bus_for_each_resource_p() giving us those * first. */ return r; diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index b66fa42c4b1f..3662e867a124 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -533,7 +533,7 @@ void pci_read_bridge_bases(struct pci_bus *child) pci_read_bridge_mmio_pref(child); if (dev->transparent) { - pci_bus_for_each_resource(child->parent, res, i) { + pci_bus_for_each_resource_p(child->parent, res) { if (res && res->flags) { pci_bus_add_resource(child, res, PCI_SUBTRACTIVE_DECODE); diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 336d6e6ef76a..83b2f308be7e 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -770,9 +770,8 @@ static struct resource *find_bus_resource_of_type(struct pci_bus *bus, unsigned long type) { struct resource *r, *r_assigned = NULL; - int i; - pci_bus_for_each_resource(bus, r, i) { + pci_bus_for_each_resource_p(bus, r) { if (r == &ioport_resource || r == &iomem_resource) continue; if (r && (r->flags & type_mask) == type && !r->parent) @@ -1204,7 +1203,7 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head) additional_mmio_pref_size = 0; struct resource *pref; struct pci_host_bridge *host; - int hdr_type, i, ret; + int hdr_type, ret; list_for_each_entry(dev, &bus->devices, bus_list) { struct pci_bus *b = dev->subordinate; @@ -1228,7 +1227,7 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head) host = to_pci_host_bridge(bus->bridge); if (!host->size_windows) return; - pci_bus_for_each_resource(bus, pref, i) + pci_bus_for_each_resource_p(bus, pref) if (pref && (pref->flags & IORESOURCE_PREFETCH)) break; hdr_type = -1; /* Intentionally invalid - not a PCI device. */ @@ -1333,12 +1332,11 @@ EXPORT_SYMBOL(pci_bus_size_bridges); static void assign_fixed_resource_on_bus(struct pci_bus *b, struct resource *r) { - int i; struct resource *parent_r; unsigned long mask = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH; - pci_bus_for_each_resource(b, parent_r, i) { + pci_bus_for_each_resource_p(b, parent_r) { if (!parent_r) continue; diff --git a/include/linux/pci.h b/include/linux/pci.h index 3940435fa90a..165e4713360f 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1433,10 +1433,16 @@ int devm_request_pci_bus_resources(struct device *dev, /* Temporary until new and working PCI SBR API in place */ int pci_bridge_secondary_bus_reset(struct pci_dev *dev); -#define pci_bus_for_each_resource(bus, res, i) \ - for (i = 0; \ - (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \ - i++) +#define __pci_bus_for_each_resource(bus, res, __i, vartype) \ + for (vartype __i = 0; \ + res = pci_bus_resource_n(bus, __i), __i < PCI_BRIDGE_RESOURCE_NUM; \ + __i++) + +#define pci_bus_for_each_resource(bus, res, i) \ + __pci_bus_for_each_resource(bus, res, i, ) + +#define pci_bus_for_each_resource_p(bus, res) \ + __pci_bus_for_each_resource(bus, res, i, unsigned int) int __must_check pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, resource_size_t size,