[PATCHv8,6/6] arm: dts: socfpga: remove "clk-phase" in sdmmc_clk
Commit Message
Now that the SDMMC driver can use the "clk-phase-sd-hs" binding, we don't
need the clk-phase in the sdmmc_clk anymore.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v8: no changes
v7: no changes
v6: no changes
v5: new
---
arch/arm/boot/dts/socfpga.dtsi | 1 -
arch/arm/boot/dts/socfpga_arria10.dtsi | 1 -
2 files changed, 2 deletions(-)
@@ -453,7 +453,6 @@ sdmmc_clk: sdmmc_clk {
compatible = "altr,socfpga-gate-clk";
clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>;
clk-gate = <0xa0 8>;
- clk-phase = <0 135>;
};
sdmmc_clk_divided: sdmmc_clk_divided {
@@ -365,7 +365,6 @@ sdmmc_clk: sdmmc_clk {
compatible = "altr,socfpga-a10-gate-clk";
clocks = <&sdmmc_free_clk>;
clk-gate = <0xC8 5>;
- clk-phase = <0 135>;
};
qspi_clk: qspi_clk {