[v5,1/2] soc: loongson: add GUTS driver for loongson-2 platforms
Commit Message
The global utilities block controls PCIE device enabling, alternate
function selection for multiplexed signals, consistency of HDA, USB
and PCIE, configuration of memory controller, rtc controller, lio
controller, and clock control.
This patch adds a driver to manage and access global utilities block
for loongarch architecture Loongson-2 SoCs. Initially only reading SVR
and registering soc device are supported. Other guts accesses, such
as reading PMON configuration by default, should eventually be added
into this driver as well.
Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
---
Change in v5:
1. Add all history change log information.
Change in v4:
1. Remove menu information in Kconfig.
Change in v3:
1. Replace string loongson2/Loongson2 with Loongson-2/loongson-2
in commit message, Kconfig, Makefile file.
2. Replace string LOONGSON2 with LOONGSON-2.
Change in v2:
1. Add architecture support commit log description.
2. Add other guts accesses plan commit log description.
3. Add "depends on LOONGARCH || COMPILE_TEST" for
LOONGSON2_GUTS in Kconfig.
4. Move the scfg_guts to .c file from .h and delete .h.
5. Remove __packed on scfg_guts.
MAINTAINERS | 6 +
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/loongson/Kconfig | 18 +++
drivers/soc/loongson/Makefile | 6 +
drivers/soc/loongson/loongson2_guts.c | 189 ++++++++++++++++++++++++++
6 files changed, 221 insertions(+)
create mode 100644 drivers/soc/loongson/Kconfig
create mode 100644 drivers/soc/loongson/Makefile
create mode 100644 drivers/soc/loongson/loongson2_guts.c
Comments
On Thu, Nov 3, 2022, at 09:19, Yinbo Zhu wrote:
> The global utilities block controls PCIE device enabling, alternate
> function selection for multiplexed signals, consistency of HDA, USB
> and PCIE, configuration of memory controller, rtc controller, lio
> controller, and clock control.
>
> This patch adds a driver to manage and access global utilities block
> for loongarch architecture Loongson-2 SoCs. Initially only reading SVR
> and registering soc device are supported. Other guts accesses, such
> as reading PMON configuration by default, should eventually be added
> into this driver as well.
>
> Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Looks ok to me. I can take the new driver through the SoC tree,
so please send it to soc@kernel.org once there are no more
remaining review comments that need to be addressed.
One last thing from my side, with that addressed, please add my
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
> +config LOONGSON2_GUTS
> + tristate "Loongson-2 GUTS"
> + depends on LOONGARCH || COMPILE_TEST
> + select SOC_BUS
In the one-line description, please spell out GUTS, since this
is not a generic term but apparently is something that is only
used on Loongarch and Layerscape.
Just for clarification: is this derived from the same IP block
that NXP are using, or is this just coincidentally named
similarly?
Arnd
在 2022/11/3 下午4:53, Arnd Bergmann 写道:
> On Thu, Nov 3, 2022, at 09:19, Yinbo Zhu wrote:
>> The global utilities block controls PCIE device enabling, alternate
>> function selection for multiplexed signals, consistency of HDA, USB
>> and PCIE, configuration of memory controller, rtc controller, lio
>> controller, and clock control.
>>
>> This patch adds a driver to manage and access global utilities block
>> for loongarch architecture Loongson-2 SoCs. Initially only reading SVR
>> and registering soc device are supported. Other guts accesses, such
>> as reading PMON configuration by default, should eventually be added
>> into this driver as well.
>>
>> Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
>
> Looks ok to me. I can take the new driver through the SoC tree,
> so please send it to soc@kernel.org once there are no more
> remaining review comments that need to be addressed.
>
> One last thing from my side, with that addressed, please add my
>
> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
okay, I had added it in v6.
>
>> +config LOONGSON2_GUTS
>> + tristate "Loongson-2 GUTS"
>> + depends on LOONGARCH || COMPILE_TEST
>> + select SOC_BUS
>
> In the one-line description, please spell out GUTS, since this
> is not a generic term but apparently is something that is only
> used on Loongarch and Layerscape.
okay, I had added it in v6.
>
> Just for clarification: is this derived from the same IP block
> that NXP are using, or is this just coincidentally named
> similarly?
Not the same IP block, it was only use this GUTS name to description
the register blocks.
Thanks
Yinbo
>
> Arnd
>
@@ -12041,6 +12041,12 @@ S: Maintained
F: Documentation/devicetree/bindings/pinctrl/loongson,ls2k-pinctrl.yaml
F: drivers/pinctrl/pinctrl-loongson2.c
+LOONGSON-2 SOC SERIES GUTS DRIVER
+M: Yinbo Zhu <zhuyinbo@loongson.cn>
+L: loongarch@lists.linux.dev
+S: Maintained
+F: drivers/soc/loongson/loongson2_guts.c
+
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Sathya Prakash <sathya.prakash@broadcom.com>
M: Sreekanth Reddy <sreekanth.reddy@broadcom.com>
@@ -13,6 +13,7 @@ source "drivers/soc/fujitsu/Kconfig"
source "drivers/soc/imx/Kconfig"
source "drivers/soc/ixp4xx/Kconfig"
source "drivers/soc/litex/Kconfig"
+source "drivers/soc/loongson/Kconfig"
source "drivers/soc/mediatek/Kconfig"
source "drivers/soc/microchip/Kconfig"
source "drivers/soc/pxa/Kconfig"
@@ -18,6 +18,7 @@ obj-y += imx/
obj-y += ixp4xx/
obj-$(CONFIG_SOC_XWAY) += lantiq/
obj-$(CONFIG_LITEX_SOC_CONTROLLER) += litex/
+obj-y += loongson/
obj-y += mediatek/
obj-y += microchip/
obj-y += pxa/
new file mode 100644
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Loongson-2 series SoC drivers
+#
+
+config LOONGSON2_GUTS
+ tristate "Loongson-2 GUTS"
+ depends on LOONGARCH || COMPILE_TEST
+ select SOC_BUS
+ help
+ The global utilities block controls PCIE device enabling, alternate
+ function selection for multiplexed signals, consistency of HDA, USB
+ and PCIE, configuration of memory controller, rtc controller, lio
+ controller, and clock control. This patch adds a driver to manage
+ and access global utilities block for loongarch architecture Loongson-2
+ SoCs. Initially only reading SVR and registering soc device are
+ supported. Other guts accesses, such as reading PMON configuration by
+ default, should eventually be added into this driver as well.
new file mode 100644
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Makefile for the Linux Kernel SoC Loongson-2 specific device drivers
+#
+
+obj-$(CONFIG_LOONGSON2_GUTS) += loongson2_guts.o
new file mode 100644
@@ -0,0 +1,189 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Author: Yinbo Zhu <zhuyinbo@loongson.cn>
+ * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
+ */
+
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/of_fdt.h>
+#include <linux/sys_soc.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+
+static struct soc_device_attribute soc_dev_attr;
+static struct soc_device *soc_dev;
+
+/*
+ * Global Utility Registers.
+ *
+ * Not all registers defined in this structure are available on all chips, so
+ * you are expected to know whether a given register actually exists on your
+ * chip before you access it.
+ *
+ * Also, some registers are similar on different chips but have slightly
+ * different names. In these cases, one name is chosen to avoid extraneous
+ * #ifdefs.
+ */
+struct scfg_guts {
+ u32 svr; /* Version Register */
+ u8 res0[4];
+ u16 feature; /* Feature Register */
+ u32 vendor; /* Vendor Register */
+ u8 res1[6];
+ u32 id;
+ u8 res2[0x3ff8 - 0x18];
+ u32 chip;
+};
+
+static struct guts {
+ struct scfg_guts __iomem *regs;
+ bool little_endian;
+} *guts;
+
+struct loongson2_soc_die_attr {
+ char *die;
+ u32 svr;
+ u32 mask;
+};
+
+/* SoC die attribute definition for Loongson-2 platform */
+static const struct loongson2_soc_die_attr loongson2_soc_die[] = {
+
+ /*
+ * LA-based SoCs Loongson-2 Series
+ */
+
+ /* Die: 2k1000la, SoC: 2k1000la */
+ { .die = "2K1000LA",
+ .svr = 0x00000013,
+ .mask = 0x000000ff,
+ },
+ { },
+};
+
+static const struct loongson2_soc_die_attr *loongson2_soc_die_match(
+ u32 svr, const struct loongson2_soc_die_attr *matches)
+{
+ while (matches->svr) {
+ if (matches->svr == (svr & matches->mask))
+ return matches;
+ matches++;
+ };
+
+ return NULL;
+}
+
+static u32 loongson2_guts_get_svr(void)
+{
+ u32 svr = 0;
+
+ if (!guts || !guts->regs)
+ return svr;
+
+ if (guts->little_endian)
+ svr = ioread32(&guts->regs->svr);
+ else
+ svr = ioread32be(&guts->regs->svr);
+
+ return svr;
+}
+
+static int loongson2_guts_probe(struct platform_device *pdev)
+{
+ struct device_node *root, *np = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ const struct loongson2_soc_die_attr *soc_die;
+ const char *machine;
+ u32 svr;
+
+ /* Initialize guts */
+ guts = devm_kzalloc(dev, sizeof(*guts), GFP_KERNEL);
+ if (!guts)
+ return -ENOMEM;
+
+ guts->little_endian = of_property_read_bool(np, "little-endian");
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ guts->regs = ioremap(res->start, res->end - res->start + 1);
+ if (IS_ERR(guts->regs))
+ return PTR_ERR(guts->regs);
+
+ /* Register soc device */
+ root = of_find_node_by_path("/");
+ if (of_property_read_string(root, "model", &machine))
+ of_property_read_string_index(root, "compatible", 0, &machine);
+ of_node_put(root);
+ if (machine)
+ soc_dev_attr.machine = devm_kstrdup(dev, machine, GFP_KERNEL);
+
+ svr = loongson2_guts_get_svr();
+ soc_die = loongson2_soc_die_match(svr, loongson2_soc_die);
+ if (soc_die) {
+ soc_dev_attr.family = devm_kasprintf(dev, GFP_KERNEL,
+ "Loongson %s", soc_die->die);
+ } else {
+ soc_dev_attr.family = devm_kasprintf(dev, GFP_KERNEL, "Loongson");
+ }
+ if (!soc_dev_attr.family)
+ return -ENOMEM;
+ soc_dev_attr.soc_id = devm_kasprintf(dev, GFP_KERNEL,
+ "svr:0x%08x", svr);
+ if (!soc_dev_attr.soc_id)
+ return -ENOMEM;
+ soc_dev_attr.revision = devm_kasprintf(dev, GFP_KERNEL, "%d.%d",
+ (svr >> 4) & 0xf, svr & 0xf);
+ if (!soc_dev_attr.revision)
+ return -ENOMEM;
+
+ soc_dev = soc_device_register(&soc_dev_attr);
+ if (IS_ERR(soc_dev))
+ return PTR_ERR(soc_dev);
+
+ pr_info("Machine: %s\n", soc_dev_attr.machine);
+ pr_info("SoC family: %s\n", soc_dev_attr.family);
+ pr_info("SoC ID: %s, Revision: %s\n",
+ soc_dev_attr.soc_id, soc_dev_attr.revision);
+
+ return 0;
+}
+
+static int loongson2_guts_remove(struct platform_device *dev)
+{
+ soc_device_unregister(soc_dev);
+
+ return 0;
+}
+
+/*
+ * Table for matching compatible strings, for device tree
+ * guts node, for Loongson-2 SoCs.
+ */
+static const struct of_device_id loongson2_guts_of_match[] = {
+ { .compatible = "loongson,ls2k-chipid", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, loongson2_guts_of_match);
+
+static struct platform_driver loongson2_guts_driver = {
+ .driver = {
+ .name = "loongson2-guts",
+ .of_match_table = loongson2_guts_of_match,
+ },
+ .probe = loongson2_guts_probe,
+ .remove = loongson2_guts_remove,
+};
+
+static int __init loongson2_guts_init(void)
+{
+ return platform_driver_register(&loongson2_guts_driver);
+}
+core_initcall(loongson2_guts_init);
+
+static void __exit loongson2_guts_exit(void)
+{
+ platform_driver_unregister(&loongson2_guts_driver);
+}
+module_exit(loongson2_guts_exit);