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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j4-20020a170903028400b0018049a28eabsi16399463plr.617.2022.11.02.23.51.20; Wed, 02 Nov 2022 23:51:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=IIo87V0q; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231180AbiKCGtM (ORCPT + 99 others); Thu, 3 Nov 2022 02:49:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60160 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229637AbiKCGs7 (ORCPT ); Thu, 3 Nov 2022 02:48:59 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F20316305; Wed, 2 Nov 2022 23:48:49 -0700 (PDT) X-UUID: 87f1417c5d554c53b3df4012e80376b0-20221103 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=JHljVWBcr4b76+FxHdScLRgEn2EIZbrBU/VBOXgvySU=; b=IIo87V0qtP+CSq17rIjsL2q4oViSexqgUXZAEqvjMa291yRekBJzGVGAkxLB6H+bPR8XhtX8xAuFUIFhrj97BQNXAHOPdpRozUvSFi3ZTMeP31x18nXqrsGlw5J53LJqKIPreuvU6ecHQOZTfO8wH/UK4pxVIRpsuJG/uAROwrQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.12,REQID:7177a2e1-ff03-489e-a970-1974ed962b6a,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:62cd327,CLOUDID:40957490-1a78-4832-bd08-74b1519dcfbf,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 87f1417c5d554c53b3df4012e80376b0-20221103 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1563477898; Thu, 03 Nov 2022 14:48:46 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 3 Nov 2022 14:48:44 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 3 Nov 2022 14:48:44 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Matthias Brugger , Hans Verkuil CC: Chun-Kuang Hu , , , , , Moudy Ho Subject: [PATCH v3 05/10] media: platform: mtk-mdp3: chip config split about resolution limitations Date: Thu, 3 Nov 2022 14:48:37 +0800 Message-ID: <20221103064842.12042-6-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221103064842.12042-1-moudy.ho@mediatek.com> References: <20221103064842.12042-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748456747357151532?= X-GMAIL-MSGID: =?utf-8?q?1748456747357151532?= Due to differences in hardware design, the supported max and min resolutions and scaling capabilities will vary, and should be moved and integrated into the chip configuration header file. Signed-off-by: Moudy Ho --- .../mediatek/mdp3/mt8183/mdp3-plat-mt8183.h | 19 +++++++++++++++++ .../platform/mediatek/mdp3/mtk-mdp3-core.c | 1 + .../platform/mediatek/mdp3/mtk-mdp3-core.h | 1 + .../platform/mediatek/mdp3/mtk-mdp3-regs.c | 21 +------------------ 4 files changed, 22 insertions(+), 20 deletions(-) diff --git a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h index 1be9cc55b9b5..c541176780aa 100644 --- a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h +++ b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h @@ -380,4 +380,23 @@ static const struct mdp_format mt8183_formats[] = { } }; +static const struct mdp_limit mt8183_mdp_def_limit = { + .out_limit = { + .wmin = 16, + .hmin = 16, + .wmax = 8176, + .hmax = 8176, + }, + .cap_limit = { + .wmin = 2, + .hmin = 2, + .wmax = 8176, + .hmax = 8176, + }, + .h_scale_up_max = 32, + .v_scale_up_max = 32, + .h_scale_down_max = 20, + .v_scale_down_max = 128, +}; + #endif /* __MDP3_PLAT_MT8183_H__ */ diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c index ce18cbf70e96..4b02c135b631 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c @@ -26,6 +26,7 @@ static const struct mtk_mdp_driver_data mt8183_mdp_driver_data = { .comp_data_len = ARRAY_SIZE(mt8183_mdp_comp_data), .format = mt8183_formats, .format_len = ARRAY_SIZE(mt8183_formats), + .def_limit = &mt8183_mdp_def_limit, }; static const struct of_device_id mdp_of_ids[] = { diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h index 982438a9ab02..52f87e59ba9e 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h @@ -59,6 +59,7 @@ struct mtk_mdp_driver_data { unsigned int comp_data_len; const struct mdp_format *format; unsigned int format_len; + const struct mdp_limit *def_limit; }; struct mdp_dev { diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c index cd6afbf53797..bb833ae27531 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c @@ -11,25 +11,6 @@ #include "mtk-mdp3-regs.h" #include "mtk-mdp3-m2m.h" -static const struct mdp_limit mdp_def_limit = { - .out_limit = { - .wmin = 16, - .hmin = 16, - .wmax = 8176, - .hmax = 8176, - }, - .cap_limit = { - .wmin = 2, - .hmin = 2, - .wmax = 8176, - .hmax = 8176, - }, - .h_scale_up_max = 32, - .v_scale_up_max = 32, - .h_scale_down_max = 20, - .v_scale_down_max = 128, -}; - static const struct mdp_format *mdp_find_fmt(const struct mtk_mdp_driver_data *mdp_data, u32 pixelformat, u32 type) { @@ -485,7 +466,7 @@ int mdp_frameparam_init(struct mdp_dev *mdp, struct mdp_frameparam *param) return -EINVAL; INIT_LIST_HEAD(¶m->list); - param->limit = &mdp_def_limit; + param->limit = mdp->mdp_data->def_limit; param->type = MDP_STREAM_TYPE_BITBLT; frame = ¶m->output;