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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dt5-20020a170907728500b007a96e504c7esi113163ejc.753.2022.11.02.23.01.30; Wed, 02 Nov 2022 23:01:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=HITxvXhr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231158AbiKCGAi (ORCPT + 99 others); Thu, 3 Nov 2022 02:00:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230521AbiKCGA3 (ORCPT ); Thu, 3 Nov 2022 02:00:29 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D1FE412635 for ; Wed, 2 Nov 2022 23:00:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667455225; x=1698991225; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NwQMgsKcZs/tlpXVoJMXkMuWIzP3I35y6H0OEip798w=; b=HITxvXhr2HeF3jwoNqK7Q3lyroYdPn7NSiKw1YJX7CPPGPS6qxXMNV4e m1Ro1udv3Ow3PCXtcWZSsvgL0fCuBMwje6jAsVlIKEbWLQ7unPdYvLyLg qK3aPu2zdp2IqXgpS0X9hmN4uUfxEbVqz0YApqO+A4tU+uW+p5CgV/kL2 kaU++mdozXfdNqtME9dn0L63lS95lloV9B3fdBO+LTGxgOBFP+J0jL78R +6K9TXUe/4/KCS1uBVQkj0rRoJJkcpjwq1Q8KQqDDCIZ3+OMldhH+uVEf qEc2hcex3Btjz3sBVIiR3kkwqUQ8hfEPnVVb+UQ6J8XrhODV3gifFoXsf w==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="311322509" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="311322509" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 23:00:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="723819311" X-IronPort-AV: E=Sophos;i="5.95,235,1661842800"; d="scan'208";a="723819311" Received: from allen-box.sh.intel.com ([10.239.159.48]) by FMSMGA003.fm.intel.com with ESMTP; 02 Nov 2022 23:00:22 -0700 From: Lu Baolu To: iommu@lists.linux.dev Cc: Joerg Roedel , Kevin Tian , Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 4/7] iommu/vt-d: Fold dmar_remove_one_dev_info() into its caller Date: Thu, 3 Nov 2022 13:53:26 +0800 Message-Id: <20221103055329.633052-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221103055329.633052-1-baolu.lu@linux.intel.com> References: <20221103055329.633052-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748453623145069157?= X-GMAIL-MSGID: =?utf-8?q?1748453623145069157?= Fold dmar_remove_one_dev_info() into intel_iommu_release_device() which is its only caller. Replace most of the code with device_block_translation() to make the code neat and tidy. Rename iommu_disable_dev_iotlb() to iommu_disable_pci_caps() to pair with iommu_enable_pci_caps(). Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 31 +++++-------------------------- 1 file changed, 5 insertions(+), 26 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index b956c411f2bb..393e07ac4c21 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1443,7 +1443,7 @@ static void iommu_enable_pci_caps(struct device_domain_info *info) } } -static void iommu_disable_dev_iotlb(struct device_domain_info *info) +static void iommu_disable_pci_caps(struct device_domain_info *info) { struct pci_dev *pdev; @@ -4088,30 +4088,6 @@ static void domain_context_clear(struct device_domain_info *info) &domain_context_clear_one_cb, info); } -static void dmar_remove_one_dev_info(struct device *dev) -{ - struct device_domain_info *info = dev_iommu_priv_get(dev); - struct dmar_domain *domain = info->domain; - struct intel_iommu *iommu = info->iommu; - unsigned long flags; - - if (!dev_is_real_dma_subdevice(info->dev)) { - if (dev_is_pci(info->dev) && sm_supported(iommu)) - intel_pasid_tear_down_entry(iommu, info->dev, - PASID_RID2PASID, false); - - iommu_disable_dev_iotlb(info); - domain_context_clear(info); - } - - spin_lock_irqsave(&domain->lock, flags); - list_del(&info->link); - spin_unlock_irqrestore(&domain->lock, flags); - - domain_detach_iommu(domain, iommu); - info->domain = NULL; -} - static int md_domain_init(struct dmar_domain *domain, int guest_width) { int adjust_width; @@ -4564,7 +4540,10 @@ static void intel_iommu_release_device(struct device *dev) { struct device_domain_info *info = dev_iommu_priv_get(dev); - dmar_remove_one_dev_info(dev); + iommu_disable_pci_caps(info); + domain_context_clear(info); + device_block_translation(dev); + intel_pasid_free_table(dev); dev_iommu_priv_set(dev, NULL); kfree(info);