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[2620:137:e000::1:20]) by mx.google.com with ESMTP id u9-20020a170902e80900b0017a7506e0dcsi19717553plg.231.2022.11.02.09.21.10; Wed, 02 Nov 2022 09:21:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@bytedance-com.20210112.gappssmtp.com header.s=20210112 header.b=A1TppZwD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=bytedance.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231368AbiKBQUo (ORCPT + 99 others); Wed, 2 Nov 2022 12:20:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38238 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231305AbiKBQUZ (ORCPT ); Wed, 2 Nov 2022 12:20:25 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBDC231232 for ; Wed, 2 Nov 2022 09:14:49 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id v7so5201783wmn.0 for ; Wed, 02 Nov 2022 09:14:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZXj/+tvutn9072ZUAQ/Fj8mIysO5PQhhp6FCeEN8Zrw=; b=A1TppZwD1Iw4IiArSoEXOboBO1payKvnhkZBo3OOtZHRLZ4/rXNVt6HQfaMag0SB3I o7IG79mBlebjo+m4QnYUOSccej3xGTMo2gfsJxfeykR32qFtNfnKcKC/xBPaneuroKb1 FZmHjMcT+hD//AuJYINwjZTuxoioQ+LfktSZbFrIy8ZZbm0bZt1wYOF6wRd7RphI1kmt 2xqKYWexAvzjDguIaLOmSDiOSrsYLM4XEGpfZzTZO4lq9uDHcZIq0T6w+mgWVR4gjLOD JVRPHC8kAAdfUu+ij3PWrhXEBc5OiM6ZdIrP/JUKHIaVIJoX2aguWijsZNu16WKRGULF HxRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZXj/+tvutn9072ZUAQ/Fj8mIysO5PQhhp6FCeEN8Zrw=; b=m4fjbW2sq01LkLofD8r2GgLSpn++D6kp361zS/QSnSy5N8hhczuep6Hod9TCPSkLeL yOctBpp+BzyQ1UyN4GmO0QIixEs++FF/qjtEOjMdWImHI8yEkuze4lT3coGIfQkE1mZ1 pE5vZktFWjyGYr9WQStBOX1bWimHukRGql52BQLfV7YFYqxPjXEi2CBk2yYk34hrLLmK WS3bMIhW6SSAoNAEwvWHvn4lNPtzj4SQrNYuHyrsfsu5XTvpF7NzqFurS+p1Z1W544dQ lCnYUPVwDkGAxgDIdHWoKQtATSEaLXC5ja130MtPGyWWa27nX9nLeFG/BdNa0lKNCwjB 82TQ== X-Gm-Message-State: ACrzQf1j++gQR5scr3J5HhQyoMTd++cv2k9F8HF5kr2TxE1DmjrGq0gZ mxDmxZ7WjiJ6j8FbR/EDCQinsEr4S8zxDAbF X-Received: by 2002:a05:600c:4313:b0:3cf:894d:1d05 with SMTP id p19-20020a05600c431300b003cf894d1d05mr896047wme.32.1667405659085; Wed, 02 Nov 2022 09:14:19 -0700 (PDT) Received: from usaari01.cust.communityfibre.co.uk ([2a02:6b6a:b4d7:0:6a08:9b26:ab04:7065]) by smtp.gmail.com with ESMTPSA id m17-20020a5d56d1000000b0022cc6b8df5esm13230923wrw.7.2022.11.02.09.14.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Nov 2022 09:14:18 -0700 (PDT) From: Usama Arif To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-doc@vger.kernel.org, virtualization@lists.linux-foundation.org, linux@armlinux.org.uk, yezengruan@huawei.com, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, steven.price@arm.com, mark.rutland@arm.com Cc: fam.zheng@bytedance.com, liangma@liangbit.com, punit.agrawal@bytedance.com, Usama Arif Subject: [RFC 1/6] KVM: arm64: Document PV-lock interface Date: Wed, 2 Nov 2022 16:13:35 +0000 Message-Id: <20221102161340.2982090-2-usama.arif@bytedance.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221102161340.2982090-1-usama.arif@bytedance.com> References: <20221102161340.2982090-1-usama.arif@bytedance.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748402001662833995?= X-GMAIL-MSGID: =?utf-8?q?1748402001662833995?= Introduce a paravirtualization interface for KVM/arm64 to obtain whether the VCPU is currently running or not. The PV lock structure of the guest is allocated by user space. A hypercall interface is provided for the guest to interrogate the hypervisor's support for this interface and the location of the shared memory structures. Signed-off-by: Zengruan Ye Signed-off-by: Usama Arif --- Documentation/virt/kvm/arm/pvlock.rst | 64 +++++++++++++++++++++++++ Documentation/virt/kvm/devices/vcpu.rst | 23 +++++++++ 2 files changed, 87 insertions(+) create mode 100644 Documentation/virt/kvm/arm/pvlock.rst diff --git a/Documentation/virt/kvm/arm/pvlock.rst b/Documentation/virt/kvm/arm/pvlock.rst new file mode 100644 index 000000000000..766aeef50b2d --- /dev/null +++ b/Documentation/virt/kvm/arm/pvlock.rst @@ -0,0 +1,64 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Paravirtualized lock support for arm64 +====================================== + +KVM/arm64 provides hypervisor service calls for paravirtualized guests to check +whether a VCPU is currently running or not. + +Two new SMCCC compatible hypercalls are defined: + +* PV_LOCK_FEATURES: 0xC6000020 +* PV_LOCK_PREEMPTED: 0xC6000021 + +The existence of the PV_LOCK hypercall should be probed using the SMCCC 1.1 +ARCH_FEATURES mechanism before calling it. + +PV_LOCK_FEATURES + ============= ======== ========== + Function ID: (uint32) 0xC6000020 + PV_call_id: (uint32) The function to query for support. + Currently only PV_LOCK_PREEMPTED is supported. + Return value: (int64) NOT_SUPPORTED (-1) or SUCCESS (0) if the relevant + PV-lock feature is supported by the hypervisor. + ============= ======== ========== + +PV_LOCK_PREEMPTED + ============= ======== ========== + Function ID: (uint32) 0xC6000021 + Return value: (int64) IPA of the pv lock data structure for this + VCPU. On failure: + NOT_SUPPORTED (-1) + ============= ======== ========== + +The IPA returned by PV_LOCK_PREEMPTED should be mapped by the guest as normal +memory with inner and outer write back caching attributes, in the inner +shareable domain. + +PV_LOCK_PREEMPTED returns the structure for the calling VCPU. + +PV lock state +------------- + +The structure pointed to by the PV_LOCK_PREEMPTED hypercall is as follows: + ++-----------+-------------+-------------+---------------------------------+ +| Field | Byte Length | Byte Offset | Description | ++===========+=============+=============+=================================+ +| preempted | 8 | 0 | Indicate if the VCPU that owns | +| | | | this struct is running or not. | +| | | | Non-zero values mean the VCPU | +| | | | has been preempted. Zero means | +| | | | the VCPU is not preempted. | ++-----------+-------------+-------------+---------------------------------+ + +The preempted field will be updated to 1 by the hypervisor prior to scheduling +a VCPU. When the VCPU is scheduled out, the preempted field will be updated +to 0 by the hypervisor. + +The structure will be present within a reserved region of the normal memory +given to the guest. The guest should not attempt to write into this memory. +There is a structure per VCPU of the guest. + +For the user space interface see Documentation/virt/kvm/devices/vcpu.rst +section "4. GROUP: KVM_ARM_VCPU_PVLOCK_CTRL". diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index 716aa3edae14..223ac2fe62f0 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -263,3 +263,26 @@ From the destination VMM process: 7. Write the KVM_VCPU_TSC_OFFSET attribute for every vCPU with the respective value derived in the previous step. + +5. GROUP: KVM_ARM_VCPU_PVLOCK_CTRL +================================== + +:Architectures: ARM64 + +5.1 ATTRIBUTE: KVM_ARM_VCPU_PVLOCK_IPA +-------------------------------------- + +:Parameters: 64-bit base address + +Returns: + + ======= ====================================== + -ENXIO PV lock not implemented + -EEXIST Base address already set for this VCPU + -EINVAL Base address not 64 byte aligned + ======= ====================================== + +Specifies the base address of the pv lock structure for this VCPU. The +base address must be 64 byte aligned and exist within a valid guest memory +region. See Documentation/virt/kvm/arm/pvlock.rst for more information +including the layout of the pv lock structure.