From patchwork Tue Nov 1 09:48:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Machon X-Patchwork-Id: 13598 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2852000wru; Tue, 1 Nov 2022 02:51:18 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6XV3IL+JPyplv9/Dpk1/fdsDyarGK8Q0/WdTvac1ZyWqaPcyBmvv+PK4b5p7+chXznOYou X-Received: by 2002:a17:90a:e593:b0:212:f0e8:46ca with SMTP id g19-20020a17090ae59300b00212f0e846camr36506878pjz.144.1667296278562; Tue, 01 Nov 2022 02:51:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667296278; cv=none; d=google.com; s=arc-20160816; b=v88FEtXx/FzPzBKypnD2DUgipbpfjrFYGMiQY9jMWPKbVkr2g0xGBQuZkTVwgjbqwo dfXzIgFxk9h9nGsJNOsAa/PtXzYxwI6ztKd9Yqur+sK7DtU34RCgo2F9IjrqDjzlr5vT 2ATraXnWsvnnsOtkeX1MlGGIJnVow7RO9XfzxCF2Ja3qYZ1qZ1aa/ayaDeV8J2LyTQoz Rf8PWSpKyLTzEI+W/ahlgLkjb/ThVYBhppKDi2Ikmp7NqgMr9yj7KCYm8o0JlJ9Da7WO Z/Xm6C+EKkvNhelWKpAZuFX1Z2mu9AdbCU5ZTwKyQbj4GVmSZF3gsrlliRW1UoWYKDU7 7n2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ImcHQYYoLDMtwdhvhcE96XDTKQKjEDbI0bWqvGZyXFw=; b=O8NAhQ/wNFAgMtPoDzU9ShYCPUdtJmeGHH9CpDZX6ebWQTXVYM4y2YEYHMas0FNhO9 WCV76mqtES/20i2dgLHpOIO1NHAdKGKG9yVhNuBRFkgnc/1MnIq/XdodiZ6c9qSdReC2 EPkwM8wE7gLlSdywn/QYO54qWvz6BpRv5pAPcD/3sMBYcnQZZdxEvazvovqfX4zaXGkc ItnMx+dB90Jca3beNsbSeNB9B3uL0P2xio315DVFw05Ypjt08Kxw+mujtKEWWFphPMV5 BfD7GPonq3l6QtAO5O4dAdlyeIuaiG3xeK+fuOoQqvG16hAiobJlQ/OUXaFQN9LZIpas 2oPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=myCKtGQc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id bf9-20020a17090b0b0900b002119e6aa0casi11032564pjb.43.2022.11.01.02.51.05; Tue, 01 Nov 2022 02:51:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=myCKtGQc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230128AbiKAJld (ORCPT + 99 others); Tue, 1 Nov 2022 05:41:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230280AbiKAJkS (ORCPT ); Tue, 1 Nov 2022 05:40:18 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7AD3419285; Tue, 1 Nov 2022 02:40:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1667295600; x=1698831600; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wc4p60hzilLsjiyS5YcrB0DkuhstRRprkPQbrsrNDTc=; b=myCKtGQcLYh9oxHHld+uEKF1AMPsefG3jA8btNsTWvjPy8hoptkEQBj8 KNLAXwpbkWIkjWJXrAd+s6gdfyb2ZpVMk6vwMEl1sJ3yh+4pdqCYIowKy GxBpik49mNHbjk4dyob9YMO5QVbh9/ajSta9DKNuFZuEmqu+diNvqcXb6 JQuUriJksslMcEHZVA7zBQSK9HRz8+F9XXXuwKbDbfMNz5pnz3zav0PfP EPoleOUPOKkxmRUnFrB80CtPCUzzubZs/WYlIfr8BoV1zzo8RRp/H2zSV eO4a2C0Tv5sfhzzZm7AN092nDYmWaBBnaxvloDJjxn5HEGX3klzL5pJDx g==; X-IronPort-AV: E=Sophos;i="5.95,230,1661842800"; d="scan'208";a="187176723" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 01 Nov 2022 02:39:59 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Tue, 1 Nov 2022 02:39:55 -0700 Received: from DEN-LT-70577.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Tue, 1 Nov 2022 02:39:52 -0700 From: Daniel Machon To: CC: , , , , , , , , , , , , , , , , , Subject: [PATCH net-next v6 6/6] net: microchip: sparx5: add support for offloading default prio Date: Tue, 1 Nov 2022 10:48:34 +0100 Message-ID: <20221101094834.2726202-7-daniel.machon@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221101094834.2726202-1-daniel.machon@microchip.com> References: <20221101094834.2726202-1-daniel.machon@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748286862594375809?= X-GMAIL-MSGID: =?utf-8?q?1748286862594375809?= Add support for offloading default prio {ETHERTYPE, 0, prio}. Signed-off-by: Daniel Machon --- .../ethernet/microchip/sparx5/sparx5_dcb.c | 12 ++++++++++ .../ethernet/microchip/sparx5/sparx5_port.c | 23 +++++++++++++++++++ .../ethernet/microchip/sparx5/sparx5_port.h | 5 ++++ 3 files changed, 40 insertions(+) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c b/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c index be1dc78fc7ba..8108f3767767 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c @@ -49,6 +49,13 @@ static int sparx5_dcb_app_validate(struct net_device *dev, int err = 0; switch (app->selector) { + /* Default priority checks */ + case IEEE_8021QAZ_APP_SEL_ETHERTYPE: + if (app->protocol != 0) + err = -EINVAL; + else if (app->priority >= SPX5_PRIOS) + err = -ERANGE; + break; /* Dscp checks */ case IEEE_8021QAZ_APP_SEL_DSCP: if (app->protocol >= SPARX5_PORT_QOS_DSCP_COUNT) @@ -137,6 +144,11 @@ static int sparx5_dcb_app_update(struct net_device *dev) dscp_map = &qos.dscp.map; pcp_map = &qos.pcp.map; + /* Get default prio. */ + qos.default_prio = dcb_ieee_getapp_default_prio_mask(dev); + if (qos.default_prio) + qos.default_prio = fls(qos.default_prio) - 1; + /* Get dscp ingress mapping */ for (i = 0; i < ARRAY_SIZE(dscp_map->map); i++) { app_itr.selector = IEEE_8021QAZ_APP_SEL_DSCP; diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c index 23ef93919753..107b9cd931c0 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c @@ -1151,6 +1151,7 @@ int sparx5_port_qos_set(struct sparx5_port *port, { sparx5_port_qos_dscp_set(port, &qos->dscp); sparx5_port_qos_pcp_set(port, &qos->pcp); + sparx5_port_qos_default_set(port, qos); return 0; } @@ -1220,3 +1221,25 @@ int sparx5_port_qos_dscp_set(const struct sparx5_port *port, return 0; } + +int sparx5_port_qos_default_set(const struct sparx5_port *port, + const struct sparx5_port_qos *qos) +{ + struct sparx5 *sparx5 = port->sparx5; + + /* Set default prio and dp level */ + spx5_rmw(ANA_CL_QOS_CFG_DEFAULT_QOS_VAL_SET(qos->default_prio) | + ANA_CL_QOS_CFG_DEFAULT_DP_VAL_SET(0), + ANA_CL_QOS_CFG_DEFAULT_QOS_VAL | + ANA_CL_QOS_CFG_DEFAULT_DP_VAL, + sparx5, ANA_CL_QOS_CFG(port->portno)); + + /* Set default pcp and dei for untagged frames */ + spx5_rmw(ANA_CL_VLAN_CTRL_PORT_PCP_SET(0) | + ANA_CL_VLAN_CTRL_PORT_DEI_SET(0), + ANA_CL_VLAN_CTRL_PORT_PCP | + ANA_CL_VLAN_CTRL_PORT_DEI, + sparx5, ANA_CL_VLAN_CTRL(port->portno)); + + return 0; +} diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.h b/drivers/net/ethernet/microchip/sparx5/sparx5_port.h index 6141c0278e87..fbafe22e25cc 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.h @@ -119,6 +119,7 @@ struct sparx5_port_qos_dscp { struct sparx5_port_qos { struct sparx5_port_qos_pcp pcp; struct sparx5_port_qos_dscp dscp; + u8 default_prio; }; int sparx5_port_qos_set(struct sparx5_port *port, struct sparx5_port_qos *qos); @@ -128,4 +129,8 @@ int sparx5_port_qos_pcp_set(const struct sparx5_port *port, int sparx5_port_qos_dscp_set(const struct sparx5_port *port, struct sparx5_port_qos_dscp *qos); + +int sparx5_port_qos_default_set(const struct sparx5_port *port, + const struct sparx5_port_qos *qos); + #endif /* __SPARX5_PORT_H__ */