diff mbox series

[19/20] arm64: dts: Update cache properties for synaptics

Message ID	20221031092115.533560-1-pierre.gondois@arm.com
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; From: Pierre Gondois <pierre.gondois@arm.com> To: linux-kernel@vger.kernel.org Cc: pierre.gondois@arm.com, Rob.Herring@arm.com, Jisheng Zhang <jszhang@kernel.org>, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH 19/20] arm64: dts: Update cache properties for synaptics Date: Mon, 31 Oct 2022 10:21:14 +0100 Message-Id: <20221031092115.533560-1-pierre.gondois@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Update cache properties for arm64 DTS \| [00/20] Update cache properties for arm64 DTS [01/20] arm64: dts: Update cache properties for amd [02/20] arm64: dts: Update cache properties for amlogic [03/20] arm64: dts: Update cache properties for apm [04/20] arm64: dts: Update cache properties for arm [05/20] arm64: dts: Update cache properties for broadcom [06/20] arm64: dts: Update cache properties for exynos [07/20] arm64: dts: Update cache properties for freescale [08/20] arm64: dts: Update cache properties for hisilicon [09/20] arm64: dts: Update cache properties for lg [10/20] arm64: dts: Update cache properties for marvell [11/20] arm64: dts: Update cache properties for mediatek [12/20] arm64: dts: Update cache properties for microchip [13/20] arm64: dts: Update cache properties for nuvoton [14/20] arm64: dts: Update cache properties for nvidia [15/20] arm64: dts: Update cache properties for qcom [16/20] arm64: dts: Update cache properties for realtek [17/20] arm64: dts: Update cache properties for renesas [18/20] arm64: dts: Update cache properties for rockchip [19/20] arm64: dts: Update cache properties for synaptics [20/20] arm64: dts: Update cache properties for tesla

Commit Message

Pierre Gondois Oct. 31, 2022, 9:21 a.m. UTC

  The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes

The recently added init_of_cache_level() function checks
these properties. Add them if missing.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
---
 arch/arm64/boot/dts/synaptics/berlin4ct.dtsi | 1 +
 1 file changed, 1 insertion(+)

Comments

Jisheng Zhang Nov. 7, 2022, 3:18 p.m. UTC | #1

On Mon, Oct 31, 2022 at 10:21:14AM +0100, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
> 
> The recently added init_of_cache_level() function checks
> these properties. Add them if missing.
> 
> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>

Reviewed-by: Jisheng Zhang <jszhang@kernel.org>

> ---
>  arch/arm64/boot/dts/synaptics/berlin4ct.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
> index 0949acee4728..926da7e1a6ba 100644
> --- a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
> +++ b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
> @@ -64,6 +64,7 @@ cpu3: cpu@3 {
>  
>  		l2: cache {
>  			compatible = "cache";
> +			cache-level = <2>;
>  		};
>  
>  		idle-states {
> -- 
> 2.25.1
>

diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
index 0949acee4728..926da7e1a6ba 100644
--- a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
+++ b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
@@ -64,6 +64,7 @@  cpu3: cpu@3 {
 
 		l2: cache {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 
 		idle-states {