[06/20] arm64: dts: Update cache properties for exynos

  The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes

The recently added init_of_cache_level() function checks
these properties. Add them if missing.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 ++
 arch/arm64/boot/dts/exynos/exynos7.dtsi    | 1 +
 2 files changed, 3 insertions(+)
  

On Mon, 31 Oct 2022 10:19:45 +0100, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
> 
> The recently added init_of_cache_level() function checks
> these properties. Add them if missing.
> 
> [...]

Applied, thanks!

[06/20] arm64: dts: Update cache properties for exynos
        https://git.kernel.org/krzk/linux/c/58710ae94589a2b2baaab6b6986064b691124b0d

Best regards,
  

Hi Pierre 

>-----Original Message-----
>From: Pierre Gondois [mailto:pierre.gondois@arm.com]
>Sent: Monday, October 31, 2022 2:50 PM
>To: linux-kernel@vger.kernel.org
>Cc: pierre.gondois@arm.com; Rob.Herring@arm.com; Rob Herring
><robh+dt@kernel.org>; Krzysztof Kozlowski
><krzysztof.kozlowski+dt@linaro.org>; Alim Akhtar
><alim.akhtar@samsung.com>; devicetree@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org
>Subject: [PATCH 06/20] arm64: dts: Update cache properties for exynos
>
>The DeviceTree Specification v0.3 specifies that the cache node
'compatible'
>and 'cache-level' properties are 'required'. Cf.
>s3.8 Multi-level and Shared Cache Nodes
>
Not sure if this need to be documented in schema/yaml file as well or
already part of schema?

>The recently added init_of_cache_level() function checks these properties.
>Add them if missing.
>
>Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
>---
Changes looks good though.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>

> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 ++
> arch/arm64/boot/dts/exynos/exynos7.dtsi    | 1 +
> 2 files changed, 3 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>index bd6a354b9cb5..e9eda46801f8 100644
>--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>@@ -229,6 +229,7 @@ cluster_a57_l2: l2-cache0 {
> 			cache-size = <0x200000>;
> 			cache-line-size = <64>;
> 			cache-sets = <2048>;
>+			cache-level = <2>;
> 		};
>
> 		cluster_a53_l2: l2-cache1 {
>@@ -236,6 +237,7 @@ cluster_a53_l2: l2-cache1 {
> 			cache-size = <0x40000>;
> 			cache-line-size = <64>;
> 			cache-sets = <256>;
>+			cache-level = <2>;
> 		};
> 	};
>
>diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi
>b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>index 1cd771c90b47..aca1c32a6411 100644
>--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
>+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>@@ -110,6 +110,7 @@ atlas_l2: l2-cache0 {
> 			cache-size = <0x200000>;
> 			cache-line-size = <64>;
> 			cache-sets = <2048>;
>+			cache-level = <2>;
> 		};
> 	};
>
>--
>2.25.1
  

On 02/11/2022 21:21, Krzysztof Kozlowski wrote:
> On Mon, 31 Oct 2022 10:19:45 +0100, Pierre Gondois wrote:
>> The DeviceTree Specification v0.3 specifies that the cache node
>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>> s3.8 Multi-level and Shared Cache Nodes
>>
>> The recently added init_of_cache_level() function checks
>> these properties. Add them if missing.
>>
>> [...]
> 
> Applied, thanks!
> 
> [06/20] arm64: dts: Update cache properties for exynos
>         https://git.kernel.org/krzk/linux/c/58710ae94589a2b2baaab6b6986064b691124b0d

Now dropped. I understand this is the intention/request of v2.

When resending be sure to use proper subject prefixes.

Best regards,
Krzysztof
  

Hello Krzysztof,

This patch and [1] were dropped after a bad patch management from my part.
v1 and v2 are identical, but [2] lead to the 2 patches to be removed.
Not willing to worsen the situation, I wanted to wait a bit before getting
back to these 2 patches and let them be removed.
Would it be possible to take back these 2 patches ?

Regards,
Pierre

[1] https://lore.kernel.org/all/2d8b2d85-7bc6-026a-baf9-11a47171ddc5@linaro.org/
[2] https://lore.kernel.org/all/bb36df3f-5aee-256a-4d64-eaeb9bff998e@arm.com/

On 11/2/22 21:21, Krzysztof Kozlowski wrote:
> On Mon, 31 Oct 2022 10:19:45 +0100, Pierre Gondois wrote:
>> The DeviceTree Specification v0.3 specifies that the cache node
>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>> s3.8 Multi-level and Shared Cache Nodes
>>
>> The recently added init_of_cache_level() function checks
>> these properties. Add them if missing.
>>
>> [...]
> 
> Applied, thanks!
> 
> [06/20] arm64: dts: Update cache properties for exynos
>          https://git.kernel.org/krzk/linux/c/58710ae94589a2b2baaab6b6986064b691124b0d
> 
> Best regards,
  

On 22/11/2022 17:52, Pierre Gondois wrote:
> Hello Krzysztof,
> 
> This patch and [1] were dropped after a bad patch management from my part.
> v1 and v2 are identical, but [2] lead to the 2 patches to be removed.
> Not willing to worsen the situation, I wanted to wait a bit before getting
> back to these 2 patches and let them be removed.
> Would it be possible to take back these 2 patches ?
> 
> Regards,
> Pierre
> 
> [1] https://lore.kernel.org/all/2d8b2d85-7bc6-026a-baf9-11a47171ddc5@linaro.org/
> [2] https://lore.kernel.org/all/bb36df3f-5aee-256a-4d64-eaeb9bff998e@arm.com/
> 

I was expecting a resend with:
1. Fixed subject.
2. Changelog.
3. Trimmed list.

Best regards,
Krzysztof