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[2620:137:e000::1:20]) by mx.google.com with ESMTP id bu8-20020a170906a14800b0078dcd8dfac5si5026608ejb.467.2022.10.28.16.00.28; Fri, 28 Oct 2022 16:00:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@crapouillou.net header.s=mail header.b=VR4p+0NC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230252AbiJ1Wz6 (ORCPT + 99 others); Fri, 28 Oct 2022 18:55:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41658 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230229AbiJ1Wzm (ORCPT ); Fri, 28 Oct 2022 18:55:42 -0400 Received: from aposti.net (aposti.net [89.234.176.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C60F71D441A; Fri, 28 Oct 2022 15:55:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1666997727; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8fNxdddGM77vcHk/0yqRmbXWir62aBErY4gRc5JUiCw=; b=VR4p+0NC6nSMVR2ccrFgESFuFGCFuETqs+ZwWDQyh3U87liaLemoSCnJz7LEF2/C+CxVxh wRddo3vkGjB7oWieN1dDQGXUBgEbVWMW18TMW328k7xBDt10JxEXGYJN0xdj25nMTAggf4 cvJeJqdcxZfn8VQ8OHzfzuu0omA4bkI= From: Paul Cercueil To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, od@opendingux.net, Paul Cercueil Subject: [PATCH v2 1/4] dt-bindings: rtc: ingenic: Rework compatible strings and add #clock-cells Date: Fri, 28 Oct 2022 23:55:16 +0100 Message-Id: <20221028225519.89210-2-paul@crapouillou.net> In-Reply-To: <20221028225519.89210-1-paul@crapouillou.net> References: <20221028225519.89210-1-paul@crapouillou.net> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747974149342618910?= X-GMAIL-MSGID: =?utf-8?q?1747974149342618910?= The RTC in the JZ4770 is compatible with the JZ4760, but has an extra register that permits to configure the behaviour of the CLK32K pin. The same goes for the RTC in the JZ4780. Therefore, the ingenic,jz4770-rtc and ingenic,jz4780-rtc strings do not fall back anymore to ingenic,jz4760-rtc. The ingenic,jz4780-rtc string now falls back to the ingenic,jz4770-rtc string. Additionally, since the RTCs in the JZ4770 and JZ4780 support outputting the input oscillator's clock to the CLK32K pin, the RTC node is now also a clock provider on these SoCs, so a #clock-cells property is added. Signed-off-by: Paul Cercueil --- v2: - add constraint on which SoCs can have the #clock-cells property - add JZ4780 example which has a #clock-cells .../devicetree/bindings/rtc/ingenic,rtc.yaml | 32 +++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml index b235b2441997..d63bb727cee5 100644 --- a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml @@ -11,6 +11,16 @@ maintainers: allOf: - $ref: rtc.yaml# + - if: + not: + properties: + compatible: + contains: + enum: + - ingenic,jz4770-rtc + then: + properties: + "#clock-cells": false properties: compatible: @@ -18,14 +28,14 @@ properties: - enum: - ingenic,jz4740-rtc - ingenic,jz4760-rtc + - ingenic,jz4770-rtc - items: - const: ingenic,jz4725b-rtc - const: ingenic,jz4740-rtc - items: - enum: - - ingenic,jz4770-rtc - ingenic,jz4780-rtc - - const: ingenic,jz4760-rtc + - const: ingenic,jz4770-rtc reg: maxItems: 1 @@ -39,6 +49,9 @@ properties: clock-names: const: rtc + "#clock-cells": + const: 0 + system-power-controller: description: | Indicates that the RTC is responsible for powering OFF @@ -83,3 +96,18 @@ examples: clocks = <&cgu JZ4740_CLK_RTC>; clock-names = "rtc"; }; + + - | + #include + rtc: rtc@10003000 { + compatible = "ingenic,jz4780-rtc", "ingenic,jz4770-rtc"; + reg = <0x10003000 0x4c>; + + interrupt-parent = <&intc>; + interrupts = <32>; + + clocks = <&cgu JZ4780_CLK_RTCLK>; + clock-names = "rtc"; + + #clock-cells = <0>; + };