diff mbox series

[v5,6/7] MAINTAINERS: Add entry for Renesas RISC-V

Message ID	20221028165921.94487-7-prabhakar.mahadev-lad.rj@bp.renesas.com
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; From: Prabhakar <prabhakar.csengg@gmail.com> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Geert Uytterhoeven <geert+renesas@glider.be>, Magnus Damm <magnus.damm@gmail.com> Cc: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Heiko Stuebner <heiko@sntech.de>, Conor Dooley <conor.dooley@microchip.com>, Guo Ren <guoren@kernel.org>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@rivosinc.com>, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar <prabhakar.csengg@gmail.com>, Biju Das <biju.das.jz@bp.renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [PATCH v5 6/7] MAINTAINERS: Add entry for Renesas RISC-V Date: Fri, 28 Oct 2022 17:59:20 +0100 Message-Id: <20221028165921.94487-7-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20221028165921.94487-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20221028165921.94487-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Add support for Renesas RZ/Five SoC \| [v5,0/7] Add support for Renesas RZ/Five SoC [v5,1/7] dt-bindings: riscv: Sort the CPU core list alphabetically [v5,2/7] dt-bindings: riscv: Add Andes AX45MP core to the list [v5,3/7] riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option [v5,4/7] riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC [v5,5/7] riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK [v5,6/7] MAINTAINERS: Add entry for Renesas RISC-V [v5,7/7] riscv: configs: defconfig: Enable Renesas RZ/Five SoC

Commit Message

Lad, Prabhakar Oct. 28, 2022, 4:59 p.m. UTC

  From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add RISC-V architecture as part of ARM/Renesas architecture, as they have
the same maintainers, use the same development collaboration
infrastructure, and share many files.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
v4 -> v5
* Rebased on -next
* Included RB tag from Conor 

v3 -> v4
* Included RB tag from Geert 

v2 -> v3
* Merged as part of ARM

v1 -> v2
* New patch
---
 MAINTAINERS | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Guo Ren Oct. 29, 2022, 4:27 a.m. UTC | #1

On Sat, Oct 29, 2022 at 12:59 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add RISC-V architecture as part of ARM/Renesas architecture, as they have
> the same maintainers, use the same development collaboration
> infrastructure, and share many files.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> v4 -> v5
> * Rebased on -next
> * Included RB tag from Conor
>
> v3 -> v4
> * Included RB tag from Geert
>
> v2 -> v3
> * Merged as part of ARM
>
> v1 -> v2
> * New patch
> ---
>  MAINTAINERS | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6cdc2a74c7a2..0204f106d8c2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2691,7 +2691,7 @@ F:        arch/arm/boot/dts/rtd*
>  F:     arch/arm/mach-realtek/
>  F:     arch/arm64/boot/dts/realtek/
>
> -ARM/RENESAS ARCHITECTURE
> +ARM/RISC-V/RENESAS ARCHITECTURE
Great! Good luck RISC-V RENESAS ARCHITECTURE.

Reviewed-by: Guo Ren <guoren@kernel.org>

>  M:     Geert Uytterhoeven <geert+renesas@glider.be>
>  M:     Magnus Damm <magnus.damm@gmail.com>
>  L:     linux-renesas-soc@vger.kernel.org
> @@ -2713,6 +2713,7 @@ F:        arch/arm/include/debug/renesas-scif.S
>  F:     arch/arm/mach-shmobile/
>  F:     arch/arm64/boot/dts/renesas/
>  F:     arch/arm64/configs/renesas_defconfig
> +F:     arch/riscv/boot/dts/renesas/
>  F:     drivers/soc/renesas/
>  F:     include/linux/soc/renesas/
>
> --
> 2.25.1
>

diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 6cdc2a74c7a2..0204f106d8c2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2691,7 +2691,7 @@  F:	arch/arm/boot/dts/rtd*
 F:	arch/arm/mach-realtek/
 F:	arch/arm64/boot/dts/realtek/
 
-ARM/RENESAS ARCHITECTURE
+ARM/RISC-V/RENESAS ARCHITECTURE
 M:	Geert Uytterhoeven <geert+renesas@glider.be>
 M:	Magnus Damm <magnus.damm@gmail.com>
 L:	linux-renesas-soc@vger.kernel.org
@@ -2713,6 +2713,7 @@  F:	arch/arm/include/debug/renesas-scif.S
 F:	arch/arm/mach-shmobile/
 F:	arch/arm64/boot/dts/renesas/
 F:	arch/arm64/configs/renesas_defconfig
+F:	arch/riscv/boot/dts/renesas/
 F:	drivers/soc/renesas/
 F:	include/linux/soc/renesas/