[v4,12/13] dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Document MT6735 pin controller
Commit Message
From: Yassine Oudjana <y.oudjana@protonmail.com>
Add bindings for the pin controller found on MediaTek MT6735 and
MT6735M SoCs, including describing a method to manually specify
a pin and function in the pinmux property making defining bindings
for each pin/function combination unnecessary. The pin controllers
on those SoCs are generally identical, with the only difference
being the lack of MSDC2 pins (198-203) on MT6735M.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../pinctrl/mediatek,mt6779-pinctrl.yaml | 55 ++++++++++++++++++-
MAINTAINERS | 6 ++
2 files changed, 60 insertions(+), 1 deletion(-)
@@ -10,6 +10,7 @@ maintainers:
- Andy Teng <andy.teng@mediatek.com>
- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
- Sean Wang <sean.wang@kernel.org>
+ - Yassine Oudjana <y.oudjana@protonmail.com>
description:
The MediaTek pin controller on MT6779 is used to control pin
@@ -18,6 +19,8 @@ description:
properties:
compatible:
enum:
+ - mediatek,mt6735-pinctrl
+ - mediatek,mt6735m-pinctrl
- mediatek,mt6765-pinctrl
- mediatek,mt6779-pinctrl
- mediatek,mt6795-pinctrl
@@ -151,6 +154,42 @@ patternProperties:
allOf:
- $ref: "pinctrl.yaml#"
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt6735-pinctrl
+ - mediatek,mt6735m-pinctrl
+ then:
+ properties:
+ reg:
+ minItems: 8
+ maxItems: 8
+
+ reg-names:
+ items:
+ - const: gpio
+ - const: iocfg0
+ - const: iocfg1
+ - const: iocfg2
+ - const: iocfg3
+ - const: iocfg4
+ - const: iocfg5
+ - const: eint
+
+ interrupts:
+ items:
+ - description: EINT interrupt
+
+ patternProperties:
+ '-pins$':
+ patternProperties:
+ '^pins':
+ properties:
+ drive-strength:
+ enum: [1, 2, 4, 8, 16]
+
- if:
properties:
compatible:
@@ -349,18 +388,32 @@ examples:
};
/* GPIO0 set as multifunction GPIO0 */
- gpio-pins {
+ gpio0-pins {
pins {
pinmux = <PINMUX_GPIO0__FUNC_GPIO0>;
};
};
+ /* GPIO1 set to function 0 (GPIO) */
+ gpio1-pins {
+ pins {
+ pinmux = <(MTK_PIN_NO(1) | 0)>;
+ };
+ };
+
/* GPIO52 set as multifunction SDA0 */
i2c0-pins {
pins {
pinmux = <PINMUX_GPIO52__FUNC_SDA0>;
};
};
+
+ /* GPIO62 set to function 1 (primary function) */
+ i2c1-pins {
+ pins {
+ pinmux = <(MTK_PIN_NO(62) | 1)>;
+ };
+ };
};
mmc0 {
@@ -16314,6 +16314,12 @@ F: Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
F: Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
F: drivers/pinctrl/mediatek/
+PIN CONTROLLER - MEDIATEK MT6735
+M: Yassine Oudjana <y.oudjana@protonmail.com>
+L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
+
PIN CONTROLLER - MICROCHIP AT91
M: Ludovic Desroches <ludovic.desroches@microchip.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)