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[34.85.174.128]) by smtp.gmail.com with ESMTPSA id w7-20020ac84d07000000b0039d02911555sm991304qtv.78.2022.10.27.08.19.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Oct 2022 08:19:20 -0700 (PDT) From: Sven van Ashbrook To: LKML Cc: platform-driver-x86@vger.kernel.org, Rajneesh Bhardwaj , Rafael J Wysocki , Rajat Jain , Sven van Ashbrook , David E Box , Hans de Goede , Mark Gross , Rajneesh Bhardwaj Subject: [PATCH v1] platform/x86: intel_pmc_core: promote S0ix failure warn() to WARN() Date: Thu, 27 Oct 2022 15:19:14 +0000 Message-Id: <20221027151908.v1.1.I295e65357f06f162b46ea6fc6c03be37e3978bdc@changeid> X-Mailer: git-send-email 2.38.0.135.g90850a2211-goog MIME-Version: 1.0 X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747855300469717103?= X-GMAIL-MSGID: =?utf-8?q?1747855300469717103?= The "failure to enter S0ix" warning is critically important for monitoring and debugging power regressions, both in the field and in the test lab. Promote from lower-case warn() to upper-case WARN() so that it becomes more prominent, and gets picked up as part of existing monitoring infrastructure, which typically focuses on WARN() and ignores warn() type log messages. Signed-off-by: Sven van Ashbrook --- Against v6.1-rc2 drivers/platform/x86/intel/pmc/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c index a1fe1e0dcf4a5..834f0352c0edf 100644 --- a/drivers/platform/x86/intel/pmc/core.c +++ b/drivers/platform/x86/intel/pmc/core.c @@ -2125,7 +2125,7 @@ static __maybe_unused int pmc_core_resume(struct device *dev) } /* The real interesting case - S0ix failed - lets ask PMC why. */ - dev_warn(dev, "CPU did not enter SLP_S0!!! (S0ix cnt=%llu)\n", + dev_WARN(dev, "CPU did not enter SLP_S0!!! (S0ix cnt=%llu)\n", pmcdev->s0ix_counter); if (pmcdev->map->slps0_dbg_maps) pmc_core_slps0_display(pmcdev, dev, NULL);