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From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Mark Brown <broonie@kernel.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Banajit Goswami <bgoswami@quicinc.com>,
Konrad Dybcio <konrad.dybcio@somainline.org>,
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linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 5/6] arm64: dts: qcom: sc7280: fix codec reset line polarity
for CRD 1.0/2.0
Date: Thu, 27 Oct 2022 00:46:51 -0700
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| Series |
[1/6] arm64: dts: qcom: msm8996: fix sound card reset line polarity
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Commit Message
Dmitry Torokhov
Oct. 27, 2022, 7:46 a.m. UTC
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.
Fixes: f8b4eb64f200 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and IDP boards")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
---
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 4884647a8a95..1ac7c091e03f 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -34,7 +34,7 @@ wcd9385: audio-codec-1 { pinctrl-0 = <&wcd_reset_n>; pinctrl-1 = <&wcd_reset_n_sleep>; - reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>; qcom,rx-device = <&wcd_rx>; qcom,tx-device = <&wcd_tx>;