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(fttx-pool-80.245.77.6.bambit.de [80.245.77.6]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id 75228405D6; Thu, 27 Oct 2022 06:01:53 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/2] arm64: dts: mt7986: add PCIe nodes to BananaPi-R3 Date: Thu, 27 Oct 2022 08:01:42 +0200 Message-Id: <20221027060142.6354-3-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221027060142.6354-1-linux@fw-web.de> References: <20221027060142.6354-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: f1260125-602d-462f-afe8-10e90a54aa61 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747819591242250323?= X-GMAIL-MSGID: =?utf-8?q?1747819591242250323?= From: Frank Wunderlich Add PCIe nodes to Banana Pi R3 SBC which is used on M.2 slot. Signed-off-by: Frank Wunderlich --- .../dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi index fc100c3a6415..8eb7079cf6d7 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi @@ -181,6 +181,16 @@ &i2c0 { status = "okay"; }; +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + &pio { i2c_pins: i2c-pins { mux { @@ -247,6 +257,13 @@ conf-rst { }; }; + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_pereset"; + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi";