[1/4] arm64: dts: qcom: sm8450: move SDHCI pin configuration to DTSI
Commit Message
The SDHCI pin configuration/mux nodes are actually common to all
upstreamed boards, so define them in SoC DTSI to reduce code
duplication.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
In theory drive strength belongs to the board DTS, not SoC DTSI, but I
am following the advice here:
https://lore.kernel.org/lkml/CAD=FV=VUL4GmjaibAMhKNdpEso_Hg_R=XeMaqah1LSj_9-Ce4Q@mail.gmail.com/
---
.../qcom/sm8450-sony-xperia-nagara-pdx223.dts | 20 -------------------
arch/arm64/boot/dts/qcom/sm8450.dtsi | 20 +++++++++++++++++++
2 files changed, 20 insertions(+), 20 deletions(-)
Comments
On 26/10/2022 22:03, Krzysztof Kozlowski wrote:
> The SDHCI pin configuration/mux nodes are actually common to all
> upstreamed boards, so define them in SoC DTSI to reduce code
> duplication.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Konrad
>
> In theory drive strength belongs to the board DTS, not SoC DTSI, but I
> am following the advice here:
> https://lore.kernel.org/lkml/CAD=FV=VUL4GmjaibAMhKNdpEso_Hg_R=XeMaqah1LSj_9-Ce4Q@mail.gmail.com/
> ---
> .../qcom/sm8450-sony-xperia-nagara-pdx223.dts | 20 -------------------
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 20 +++++++++++++++++++
> 2 files changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
> index 82918c2d956f..718c690af8ad 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
> @@ -572,26 +572,6 @@ &spi10 {
> &tlmm {
> gpio-reserved-ranges = <28 4>;
>
> - sdc2_default_state: sdc2-default-state {
> - clk-pins {
> - pins = "sdc2_clk";
> - drive-strength = <16>;
> - bias-disable;
> - };
> -
> - cmd-pins {
> - pins = "sdc2_cmd";
> - drive-strength = <16>;
> - bias-pull-up;
> - };
> -
> - data-pins {
> - pins = "sdc2_data";
> - drive-strength = <16>;
> - bias-pull-up;
> - };
> - };
> -
> ts_int_default: ts-int-default-state {
> pins = "gpio23";
> function = "gpio";
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 1d1775334575..1df5c964c6f7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -2515,6 +2515,26 @@ tlmm: pinctrl@f100000 {
> gpio-ranges = <&tlmm 0 0 211>;
> wakeup-parent = <&pdc>;
>
> + sdc2_default_state: sdc2-default-state {
> + clk-pins {
> + pins = "sdc2_clk";
> + drive-strength = <16>;
> + bias-disable;
> + };
> +
> + cmd-pins {
> + pins = "sdc2_cmd";
> + drive-strength = <16>;
> + bias-pull-up;
> + };
> +
> + data-pins {
> + pins = "sdc2_data";
> + drive-strength = <16>;
> + bias-pull-up;
> + };
> + };
> +
> sdc2_sleep_state: sdc2-sleep-state {
> clk-pins {
> pins = "sdc2_clk";
@@ -572,26 +572,6 @@ &spi10 {
&tlmm {
gpio-reserved-ranges = <28 4>;
- sdc2_default_state: sdc2-default-state {
- clk-pins {
- pins = "sdc2_clk";
- drive-strength = <16>;
- bias-disable;
- };
-
- cmd-pins {
- pins = "sdc2_cmd";
- drive-strength = <16>;
- bias-pull-up;
- };
-
- data-pins {
- pins = "sdc2_data";
- drive-strength = <16>;
- bias-pull-up;
- };
- };
-
ts_int_default: ts-int-default-state {
pins = "gpio23";
function = "gpio";
@@ -2515,6 +2515,26 @@ tlmm: pinctrl@f100000 {
gpio-ranges = <&tlmm 0 0 211>;
wakeup-parent = <&pdc>;
+ sdc2_default_state: sdc2-default-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+ };
+
sdc2_sleep_state: sdc2-sleep-state {
clk-pins {
pins = "sdc2_clk";