Message ID | 20221026190549.4005703-5-quic_molvera@quicinc.com |
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State | New |
Headers |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id m21-20020a170906721500b00782e9b7305dsi2835885ejk.266.2022.10.26.12.11.00; Wed, 26 Oct 2022 12:11:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=SiMX0I+m; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234967AbiJZTK1 (ORCPT <rfc822;pwkd43@gmail.com> + 99 others); Wed, 26 Oct 2022 15:10:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55590 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234810AbiJZTIJ (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 26 Oct 2022 15:08:09 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 341F1E03C; Wed, 26 Oct 2022 12:06:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1666811164; x=1698347164; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xZHRSYU+yjUm2moVhdX98BqavTAaOK2uHU2d/+rjVqs=; b=SiMX0I+mVHU6SKwcdC2N5LWsqJsIKwiDPcwneJpPHdDcmyz+bH7f/BBB N6dKoBEoYzrp/RyKNVZ927995jkDusRw5WpjJaIpJzeLRO+qg4UyVg8sT ALYPDoqmggamKyjw2VZjvvnR/xoUPeU3WblWGjrfnbWIM/zl3cLusgP0f 0=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-02.qualcomm.com with ESMTP; 26 Oct 2022 12:06:03 -0700 X-QCInternal: smtphost Received: from nasanex01b.na.qualcomm.com ([10.46.141.250]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2022 12:06:03 -0700 Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 26 Oct 2022 12:06:03 -0700 From: Melody Olvera <quic_molvera@quicinc.com> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> CC: Robert Marko <robimarko@gmail.com>, Guru Das Srinagesh <quic_gurus@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Melody Olvera <quic_molvera@quicinc.com> Subject: [PATCH v3 4/5] dt-bindings: arm: qcom,ids: Add SoC IDs for QDU1000/QRU1000 Date: Wed, 26 Oct 2022 12:05:48 -0700 Message-ID: <20221026190549.4005703-5-quic_molvera@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221026190549.4005703-1-quic_molvera@quicinc.com> References: <20221026190549.4005703-1-quic_molvera@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nasanex01b.na.qualcomm.com (10.46.141.250) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747778518535236330?= X-GMAIL-MSGID: =?utf-8?q?1747778518535236330?= |
Series |
Add misc support for QDU1000/QRU1000 SoCs
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Commit Message
Melody Olvera
Oct. 26, 2022, 7:05 p.m. UTC
Add SoC IDs for Qualcomm QDU1000 and QRU1000 platforms and their
variants.
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
---
include/dt-bindings/arm/qcom,ids.h | 6 ++++++
1 file changed, 6 insertions(+)
Comments
On 26/10/2022 15:05, Melody Olvera wrote: > Add SoC IDs for Qualcomm QDU1000 and QRU1000 platforms and their > variants. > > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > --- Looks good, just CC of maintainers is missing. Best regards, Krzysztof
diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h index 755e08d494c5..8b1a0f43bd93 100644 --- a/include/dt-bindings/arm/qcom,ids.h +++ b/include/dt-bindings/arm/qcom,ids.h @@ -140,6 +140,12 @@ #define QCOM_ID_SC7280 487 #define QCOM_ID_SC7180P 495 #define QCOM_ID_SM6375 507 +#define QCOM_ID_QRU1000 539 +#define QCOM_ID_QDU1000 545 +#define QCOM_ID_QDU1010 587 +#define QCOM_ID_QRU1032 588 +#define QCOM_ID_QRU1052 589 +#define QCOM_ID_QRU1062 590 /* * The board type and revision information, used by Qualcomm bootloaders and