Message ID | 20221026124114.985876-3-claudiu.beznea@microchip.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id z17-20020a170902ccd100b001755f43df36si6732152ple.479.2022.10.26.05.40.06; Wed, 26 Oct 2022 05:40:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=tq7eg0ma; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233683AbiJZMjP (ORCPT <rfc822;pwkd43@gmail.com> + 99 others); Wed, 26 Oct 2022 08:39:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53730 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233755AbiJZMjJ (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 26 Oct 2022 08:39:09 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C5AEEA9F7; Wed, 26 Oct 2022 05:39:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1666787948; x=1698323948; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bisr1L61KhLBriG5s6EIXVlEsBRRUoDJM4tZkzJXrUM=; b=tq7eg0maHmhOI/KcbyBBka3Pyoi5NpCHwBl1tNAWc9RzafbGkN6sf58u pGrVJ+C9+lb1nEGkWbHoxR25UbIN7G41F1f7r0gNRaH4xYiwFMCG+e6sN XVXeRmrbOrKRNm/LRh9qz/gAsmeZR9cOxU8HYONz+4kIMU/mSV3sGXOpS sWe0l9z55x8b0y2gBro97elOHbgF5KYXrhlt2KrUbyPRKvQ9vcP1IR/mL fkHiK/iCyc4lU3rsaZmPm+PqfVb/HBrXsoY4DnQJMBwgGhxOUhuELtsBc gQyfKM261XvIthylfxkl38CqUAMEpU0MI6FRQdRJ5JZxrZk6BRW1gQF9g A==; X-IronPort-AV: E=Sophos;i="5.95,214,1661842800"; d="scan'208";a="186447241" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 26 Oct 2022 05:39:08 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 26 Oct 2022 05:39:08 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 26 Oct 2022 05:39:05 -0700 From: Claudiu Beznea <claudiu.beznea@microchip.com> To: <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <linux@armlinux.org.uk>, <arnd@arndb.de> CC: <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Claudiu Beznea <claudiu.beznea@microchip.com> Subject: [PATCH 02/11] ARM: dts: at91: sama7g5: add otpc node Date: Wed, 26 Oct 2022 15:41:05 +0300 Message-ID: <20221026124114.985876-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20221026124114.985876-1-claudiu.beznea@microchip.com> References: <20221026124114.985876-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747753916803228028?= X-GMAIL-MSGID: =?utf-8?q?1747753916803228028?= |
Series |
ARM: at91: fixes and enhancement
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Commit Message
Claudiu Beznea
Oct. 26, 2022, 12:41 p.m. UTC
Add OTPC node along with temperature calibration cell.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
arch/arm/boot/dts/sama7g5.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index 7bd8ae8e8d38..ccba1ba5336d 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -15,6 +15,7 @@ #include <dt-bindings/dma/at91.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/mfd/at91-usart.h> +#include <dt-bindings/nvmem/microchip,sama7g5-otpc.h> / { model = "Microchip SAMA7G5 family SoC"; @@ -888,6 +889,17 @@ ddr3phy: ddr3phy@e3804000 { reg = <0xe3804000 0x1000>; }; + otpc: otpc@e8c00000 { + compatible = "microchip,sama7g5-otpc", "syscon"; + reg = <0xe8c00000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + + temperature_calib: calib@1 { + reg = <OTP_PKT(1) 76>; + }; + }; + gic: interrupt-controller@e8c11000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>;