From patchwork Wed Oct 26 09:36:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 11165 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp155092wru; Wed, 26 Oct 2022 02:38:23 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6jnBmA/57zThIS1+alPyg2kR7buQqpFUgkF0YU0M706P8hBiq1SdWBN+HbieEWEL7KgJ3F X-Received: by 2002:a65:5241:0:b0:46e:f67c:c108 with SMTP id q1-20020a655241000000b0046ef67cc108mr14823370pgp.362.1666777103083; Wed, 26 Oct 2022 02:38:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666777103; cv=none; d=google.com; s=arc-20160816; b=e8Np0HUshNiFOOiw9dqZwY8ky6+qwuXw7G32f9butnitqYXRARmWWMvHjoF2tk2lyG fs1zcl/e+Gqr27vWbwvCrkhg+QphlekdRGKmf3kiodxiO36c1yrplhzyjOa7aRpTQKim /zdBxvxFwvldjUswjPc7oH5qktjtk/LKt/Fi33ooNnmDQHB7mkblSXOi6ig9IcyY3ZoA SCaNcx/fnMAMHBZPrelqrhQlmz9++6+X7dC3o+AtNTfxrXEFJ4aYU2KJY6y1vlcbgJzV miMbuYyeB/pUJN6X/OPRqit2/AcNgvKCC/wNff0Ts73OH4JTJqkiAohizJo6AJo+GbwW nwpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=GYNcRZnMPdoGHbaAS4t9PS2B+ZTfta3AIIoWlDFqlTw=; b=LQxxyomM+JSrlO2Ov7ywL8COZJml5M8sG5l/rUkvfpg7nhb+kGr82DFQZBJdqnkKjC G/XWWy98TWRNCXd88MUG+ub2wyrZs0pwR6LEjyNzVOPPkwZ9OuFl5iZ79ioYFYoUZcxb cFEEHun/NpA/SJ5rM65SWgtg2BCi3y5o7yXtN14TNjpU8vJkajRyqtrJ66tRbraaCR48 LaUBqIJUt3Gtptfp/F5xAm9vQkXn2ahU/CLnmjuFBUmZgd1NsnDUpGYN8WtDiHS5hzZI U1KGNy0KudF/k06ptq/HRsmpwgBU1TN1NUF0wm5XqZMSsPRXW8tesLEZ0jX4ssE8RiA7 bjJA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=vt5qXFKH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v202-20020a6361d3000000b0043c0b4f2b68si6044949pgb.318.2022.10.26.02.38.09; Wed, 26 Oct 2022 02:38:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mailerdienst.de header.s=20200217 header.b=vt5qXFKH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233398AbiJZJhR (ORCPT + 99 others); Wed, 26 Oct 2022 05:37:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233389AbiJZJhF (ORCPT ); Wed, 26 Oct 2022 05:37:05 -0400 Received: from mxout4.routing.net (mxout4.routing.net [IPv6:2a03:2900:1:a::9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B571BB3A4; Wed, 26 Oct 2022 02:37:03 -0700 (PDT) Received: from mxbox4.masterlogin.de (unknown [192.168.10.79]) by mxout4.routing.net (Postfix) with ESMTP id 4209E102646; Wed, 26 Oct 2022 09:37:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1666777021; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GYNcRZnMPdoGHbaAS4t9PS2B+ZTfta3AIIoWlDFqlTw=; b=vt5qXFKHFn7GNm+aX0KmA625G+w6tlTim53YUfh4bhqO8h0hUs84Q/8ah2/Hs5JUuTOeuh XWjyT0UPUWuWnGR4JW0oqP1V7wP/o4tyG0Flf4Ww801LlRt2jn1MEUne6quV2iPv6YSb0q lZjMiU6CY4sbbZ0GARxpBXiC9ZAYJsc= Received: from frank-G5.. (fttx-pool-80.245.72.174.bambit.de [80.245.72.174]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id 83CB180ADC; Wed, 26 Oct 2022 09:37:00 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Matthias Brugger , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Shih Subject: [RFC v2 2/7] arm64: dts: mt7986: add spi related device nodes Date: Wed, 26 Oct 2022 11:36:45 +0200 Message-Id: <20221026093650.110290-3-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221026093650.110290-1-linux@fw-web.de> References: <20221026093650.110290-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: f63a6cba-36ee-498e-95fd-b815b87a5642 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747742467601567086?= X-GMAIL-MSGID: =?utf-8?q?1747742467601567086?= From: Sam Shih This patch adds spi support for MT7986. Signed-off-by: Sam Shih Signed-off-by: Frank Wunderlich --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 35 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 28 ++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 35 ++++++++++++++++++++ 3 files changed, 98 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 6189436fe31d..58f7e6b169bf 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -55,6 +55,20 @@ switch: switch@0 { }; &pio { + spi_flash_pins: spi-flash-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + spic_pins: spic-pins { + mux { + function = "spi"; + groups = "spi1_2"; + }; + }; + uart1_pins: uart1-pins { mux { function = "uart"; @@ -101,6 +115,27 @@ conf { }; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + cs-gpios = <0>, <0>; + status = "okay"; + spi_nand: spi_nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + cs-gpios = <0>, <0>; + status = "okay"; +}; + &switch { ports { #address-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 226648f48df2..6d881095d933 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -112,6 +112,34 @@ infracfg: infracfg@10001000 { #clock-cells = <1>; }; + spi0: spi@1100a000 { + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100a000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MPLL_D2>, + <&topckgen CLK_TOP_SPI_SEL>, + <&infracfg CLK_INFRA_SPI0_CK>, + <&infracfg CLK_INFRA_SPI0_HCK_CK>; + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; + status = "disabled"; + }; + + spi1: spi@1100b000 { + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100b000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MPLL_D2>, + <&topckgen CLK_TOP_SPIM_MST_SEL>, + <&infracfg CLK_INFRA_SPI1_CK>, + <&infracfg CLK_INFRA_SPI1_HCK_CK>; + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; + status = "disabled"; + }; + topckgen: topckgen@1001b000 { compatible = "mediatek,mt7986-topckgen", "syscon"; reg = <0 0x1001B000 0 0x1000>; diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts index 7459ddb6b6f0..7673aa3fa6ae 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -96,6 +96,20 @@ fixed-link { }; &pio { + spi_flash_pins: spi-flash-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + spic_pins: spic-pins { + mux { + function = "spi"; + groups = "spi1_2"; + }; + }; + wf_2g_5g_pins: wf-2g-5g-pins { mux { function = "wifi"; @@ -128,6 +142,27 @@ conf { }; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + cs-gpios = <0>, <0>; + status = "okay"; + spi_nand: spi_nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + cs-gpios = <0>, <0>; + status = "okay"; +}; + &uart0 { status = "okay"; };