[v2,07/11] arm64: dts: ti: k3-am64-main: add VTM node
Commit Message
The am64x supports a single VTM module which is located in the main
domain with two associated temperature monitors located at different hot
spots on the die.
Signed-off-by: Bryan Brattlof <bb@ti.com>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 8 +++++
arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi | 33 +++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am64.dtsi | 4 +++
3 files changed, 45 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi
@@ -1356,4 +1356,12 @@ elm0: ecc@25010000 {
clocks = <&k3_clks 54 0>;
clock-names = "fck";
};
+
+ vtm0: temperature-sensor@b00000 {
+ compatible = "ti,j7200-vtm";
+ reg = <0x00 0xb00000 0x00 0x400>,
+ <0x00 0xb01000 0x00 0x400>;
+ power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
+ #thermal-sensor-cells = <1>;
+ };
};
new file mode 100644
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/thermal/thermal.h>
+
+thermal_zones: thermal-zones {
+ main0_thermal: main0-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&vtm0 0>;
+
+ trips {
+ main0_crit: main0-crit {
+ temperature = <105000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ main1_thermal: main1-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&vtm0 1>;
+
+ trips {
+ main1_crit: main1-crit {
+ temperature = <105000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+};
@@ -69,6 +69,7 @@ cbass_main: bus@f4000 {
<0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
<0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
<0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
+ <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
<0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
<0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
<0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
@@ -105,6 +106,9 @@ cbass_mcu: bus@4000000 {
ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */
};
};
+
+ #include "k3-am64-thermal.dtsi"
+
};
/* Now include the peripherals for each bus segments */