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(fttx-pool-217.61.152.57.bambit.de [217.61.152.57]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id 9B149406DF; Tue, 25 Oct 2022 13:30:00 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Chaotian Jing , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Wenbin Mei , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sam Shih Subject: [PATCH v5 3/6] arm64: dts: mediatek: mt2712e: swap last 2 clocks to match binding Date: Tue, 25 Oct 2022 15:29:50 +0200 Message-Id: <20221025132953.81286-4-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221025132953.81286-1-linux@fw-web.de> References: <20221025132953.81286-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: f049c69f-c4f7-41cc-b7ee-c69fafc39865 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747666517515157215?= X-GMAIL-MSGID: =?utf-8?q?1747666517515157215?= From: Frank Wunderlich First 3 clocks for mt2712 need to be "source", "hclk", "source_cg" so swap last 2 of mmc0 to match the binding. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index e6d7453e56e0..9dc0794fcd2e 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -766,9 +766,9 @@ mmc0: mmc@11230000 { interrupts = ; clocks = <&pericfg CLK_PERI_MSDC30_0>, <&pericfg CLK_PERI_MSDC50_0_HCLK_EN>, - <&pericfg CLK_PERI_MSDC30_0_QTR_EN>, - <&pericfg CLK_PERI_MSDC50_0_EN>; - clock-names = "source", "hclk", "bus_clk", "source_cg"; + <&pericfg CLK_PERI_MSDC50_0_EN>, + <&pericfg CLK_PERI_MSDC30_0_QTR_EN>; + clock-names = "source", "hclk", "source_cg", "bus_clk"; status = "disabled"; };