From patchwork Mon Oct 24 11:31:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 9164 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp457850wru; Mon, 24 Oct 2022 06:36:38 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6CYH5bUoCaVvu2I5otqpGMhA2lfI/qovr5L7t5R5ylzb9C/foCxD+q1d+edSXsJ1uhbIIF X-Received: by 2002:a62:b404:0:b0:56b:e147:1ae5 with SMTP id h4-20020a62b404000000b0056be1471ae5mr4014671pfn.78.1666618598375; Mon, 24 Oct 2022 06:36:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666618598; cv=none; d=google.com; s=arc-20160816; b=SO34I0nc8HhFtghoHH8l6qNA+vzEVnozLRjMLLmSLAqvCWSAlwvyRrlMBSiNZRK23H uCijysoh0hiMG1UFudbJ64ral7ZmSn6giYEDSvxTsoZ6qFzOQ3ytHCqQnpV+xyn60OHt hJ7HuKaDJDQ0wm6ukQGiqMAgJaRBbvXdX9lTMWTqQmgwpPtiq+gHEyKxZZn2VEEI+OWJ uCAG8DzrY6HOQUiNp5WC1p9W8DOI16IbF3c2/z3YuK4piYHku7jlir+RTuIa9LbSyrfG kjt6oYXgedSZVayBp/hSNXsN3lWx6pWfjTzAg6N7J7QeQ92QPj454wVJ3wcX6F68wwml 28ww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TCG/H56168Z/FStdZ5pbf4QHdW7UjOmTrQQM51mXBYE=; b=Hd+jEe3CsSY9DavJX1uMIotcFDhptmaHspaMroLsVlWe1ooZ5bMlhdbYTFkVeqvJbE eX69MjTnP6Y3dEVYGagVqfKlcPsAEPpC5WhPz3apMajAGkvHrPOpYSx64Sci8AA0RXP7 ECg2HVU79VfxVbNAJQWDJKfbkkh37UZ45dmXhCM1RD6ZWYBko7SHDwT5dFJVGICQZdk2 ycc0IeiZKuFJNyqCSDuacxgmJRAwg1XVJhJcshutz/xQT3VeiEv+/AE33NnhzXMxOfsl IfgU33rSIdK0MxJUxbNk8P2yv9klYkHnDz+PIgxsrzWLZY/wV7x6TacfOJjPmo238oqA A50Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=jzbXUN0r; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d18-20020a631d52000000b0044d470e823fsi35854080pgm.327.2022.10.24.06.35.57; Mon, 24 Oct 2022 06:36:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=jzbXUN0r; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231516AbiJXN2Q (ORCPT + 99 others); Mon, 24 Oct 2022 09:28:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236448AbiJXNZr (ORCPT ); Mon, 24 Oct 2022 09:25:47 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E18EA87A0; Mon, 24 Oct 2022 05:31:42 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 353436132D; Mon, 24 Oct 2022 12:31:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 43CC6C433D6; Mon, 24 Oct 2022 12:31:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1666614675; bh=G/OHn58614PeSTz3odz4MZOluuswRe+RhmJGMZbmQEM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jzbXUN0rGKFqyTTu2fJKMNiD2WwRLUeRbPDGzC83WeDKT79NzpmtK7BNJqCC/STaJ 0hZCNW/QgvhQWvLL7gxfYutGIj00WdcjQ2otgsVh62zKHtnndthBwpRjFMnAM4SlqJ n5mKZDcE65rWWiQAtkCv9j495aASczWRvSnO4TJI= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Serge Vasilugin , Daniel Golle , Stanislaw Gruszka , Kalle Valo , Sasha Levin Subject: [PATCH 5.10 320/390] wifi: rt2x00: set SoC wmac clock register Date: Mon, 24 Oct 2022 13:31:57 +0200 Message-Id: <20221024113036.623667593@linuxfoundation.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221024113022.510008560@linuxfoundation.org> References: <20221024113022.510008560@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747576263102706617?= X-GMAIL-MSGID: =?utf-8?q?1747576263102706617?= From: Daniel Golle [ Upstream commit cbde6ed406a51092d9e8a2df058f5f8490f27443 ] Instead of using the default value 33 (pci), set US_CYC_CNT init based on Programming guide: If available, set chipset bus clock with fallback to cpu clock/3. Reported-by: Serge Vasilugin Signed-off-by: Daniel Golle Acked-by: Stanislaw Gruszka Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/3e275d259f476f597dab91a9c395015ef3fe3284.1663445157.git.daniel@makrotopia.org Signed-off-by: Sasha Levin --- .../net/wireless/ralink/rt2x00/rt2800lib.c | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c index 94e5c3c373ba..f237fc17dedc 100644 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c @@ -6112,6 +6112,27 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) reg = rt2800_register_read(rt2x00dev, US_CYC_CNT); rt2x00_set_field32(®, US_CYC_CNT_CLOCK_CYCLE, 125); rt2800_register_write(rt2x00dev, US_CYC_CNT, reg); + } else if (rt2x00_is_soc(rt2x00dev)) { + struct clk *clk = clk_get_sys("bus", NULL); + int rate; + + if (IS_ERR(clk)) { + clk = clk_get_sys("cpu", NULL); + + if (IS_ERR(clk)) { + rate = 125; + } else { + rate = clk_get_rate(clk) / 3000000; + clk_put(clk); + } + } else { + rate = clk_get_rate(clk) / 1000000; + clk_put(clk); + } + + reg = rt2800_register_read(rt2x00dev, US_CYC_CNT); + rt2x00_set_field32(®, US_CYC_CNT_CLOCK_CYCLE, rate); + rt2800_register_write(rt2x00dev, US_CYC_CNT, reg); } reg = rt2800_register_read(rt2x00dev, HT_FBK_CFG0);