Message ID | 20221024105229.v3.4.I7d01f9ad11bacdc9213dee61b7918982aea39115@changeid |
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State | New |
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Series |
mmc: sdhci controllers: Fix SDHCI_RESET_ALL for CQHCI
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Commit Message
Brian Norris
Oct. 24, 2022, 5:54 p.m. UTC
[[ NOTE: this is completely untested by the author, but included solely because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Include this fix by way of the new sdhci_and_cqhci_reset() helper. Fixes: bb6e358169bf ("mmc: sdhci-esdhc-imx: add CMDQ support") Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Haibo Chen <haibo.chen@nxp.com> --- Changes in v3: - Use new SDHCI+CQHCI helper - Add Reviewed-by Changes in v2: - Drop unnecessary ESDHC_FLAG_CQHCI check drivers/mmc/host/sdhci-esdhc-imx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Comments
On 24/10/22 20:54, Brian Norris wrote: > [[ NOTE: this is completely untested by the author, but included solely > because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix > SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other > drivers using CQHCI might benefit from a similar change, if they > also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same > bug on at least MSM, Arasan, and Intel hardware. ]] > > SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't > tracking that properly in software. When out of sync, we may trigger > various timeouts. > > It's not typical to perform resets while CQE is enabled, but this may > occur in some suspend or error recovery scenarios. > > Include this fix by way of the new sdhci_and_cqhci_reset() helper. > > Fixes: bb6e358169bf ("mmc: sdhci-esdhc-imx: add CMDQ support") > Signed-off-by: Brian Norris <briannorris@chromium.org> > Reviewed-by: Haibo Chen <haibo.chen@nxp.com> This patch is dependent on "mmc: cqhci: Provide helper for resetting both SDHCI and CQHCI". Best point that out in this commit message as well. Otherwise: Acked-by: Adrian Hunter <adrian.hunter@intel.com> > --- > > Changes in v3: > - Use new SDHCI+CQHCI helper > - Add Reviewed-by > > Changes in v2: > - Drop unnecessary ESDHC_FLAG_CQHCI check > > drivers/mmc/host/sdhci-esdhc-imx.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c > index 55981b0f0b10..b297c3c360eb 100644 > --- a/drivers/mmc/host/sdhci-esdhc-imx.c > +++ b/drivers/mmc/host/sdhci-esdhc-imx.c > @@ -25,6 +25,7 @@ > #include <linux/of_device.h> > #include <linux/pinctrl/consumer.h> > #include <linux/pm_runtime.h> > +#include "sdhci-cqhci.h" > #include "sdhci-pltfm.h" > #include "sdhci-esdhc.h" > #include "cqhci.h" > @@ -1288,7 +1289,7 @@ static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing) > > static void esdhc_reset(struct sdhci_host *host, u8 mask) > { > - sdhci_reset(host, mask); > + sdhci_and_cqhci_reset(host, mask); > > sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); > sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 55981b0f0b10..b297c3c360eb 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -25,6 +25,7 @@ #include <linux/of_device.h> #include <linux/pinctrl/consumer.h> #include <linux/pm_runtime.h> +#include "sdhci-cqhci.h" #include "sdhci-pltfm.h" #include "sdhci-esdhc.h" #include "cqhci.h" @@ -1288,7 +1289,7 @@ static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing) static void esdhc_reset(struct sdhci_host *host, u8 mask) { - sdhci_reset(host, mask); + sdhci_and_cqhci_reset(host, mask); sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);