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[2620:137:e000::1:20]) by mx.google.com with ESMTP id hq15-20020a1709073f0f00b0078dcd8dfac5si27507420ejc.467.2022.10.24.03.27.30; Mon, 24 Oct 2022 03:27:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=YGnTc+IR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231185AbiJXKX6 (ORCPT + 99 others); Mon, 24 Oct 2022 06:23:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44266 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230162AbiJXKXg (ORCPT ); Mon, 24 Oct 2022 06:23:36 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44EAC578A3; Mon, 24 Oct 2022 03:23:36 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3845F6602828; Mon, 24 Oct 2022 11:23:34 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1666607015; bh=cFT+o4Ig5ByoGHgC0vTyak35uHSg61Q19NXiTzNpjik=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YGnTc+IReCmRA7bWXydR2Hdv6Bnn/uXbOJEQs3d5d1uM7N/BdzOYHrqhl/cBsuxiV j4ilXDkZQB6Ck2HaALWVoVrCrIohYi/D+L83SkLZmn5XROg3mN2oAcexcOkhvgiXLP JsNHFR0ZWvA+BfihXEbIQKuf0vRWdX9mUUnNE8RJV0KNf/EnW7mfrrbzqhkxIy88/U mINd1Y8HbJj3wwdn/QPkIKqwQpNTcc3OCa+1ILgSVGtReh31CdnDEECKpUdGwhfyWH SqDqV4zEtyi2+k+SM8EuPaGogGR2o4Z+9FBdQlcbczkbFOta+ARFPzJPddgVRTl8G/ ZGb50/3OipgwA== From: AngeloGioacchino Del Regno To: sboyd@kernel.org Cc: mturquette@baylibre.com, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, miles.chen@mediatek.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, chun-jie.chen@mediatek.com, jose.exposito89@gmail.com, yangyingliang@huawei.com, msp@baylibre.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/10] clk: mediatek: mt8186-mfg: Propagate rate changes to parent Date: Mon, 24 Oct 2022 12:23:06 +0200 Message-Id: <20221024102307.33722-10-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221024102307.33722-1-angelogioacchino.delregno@collabora.com> References: <20221024102307.33722-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747564389857842035?= X-GMAIL-MSGID: =?utf-8?q?1747564389857842035?= Propagate the rate changes to MFG_BG3D's parent on MT8186 to allow for proper GPU DVFS. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- drivers/clk/mediatek/clk-mt8186-mfg.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8186-mfg.c b/drivers/clk/mediatek/clk-mt8186-mfg.c index f1f92216f894..0142d741053a 100644 --- a/drivers/clk/mediatek/clk-mt8186-mfg.c +++ b/drivers/clk/mediatek/clk-mt8186-mfg.c @@ -16,8 +16,9 @@ static const struct mtk_gate_regs mfg_cg_regs = { .sta_ofs = 0x0, }; -#define GATE_MFG(_id, _name, _parent, _shift) \ - GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, &mtk_clk_gate_ops_setclr) +#define GATE_MFG(_id, _name, _parent, _shift) \ + GATE_MTK_FLAGS(_id, _name, _parent, &mfg_cg_regs, _shift, \ + &mtk_clk_gate_ops_setclr, CLK_SET_RATE_PARENT) static const struct mtk_gate mfg_clks[] = { GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "top_mfg", 0),