dt-bindings: pinctrl: update uart/mmc bindings for MT7986 SoC

Message ID 20221024073634.6834-1-linux@fw-web.de
State New
Headers
Series dt-bindings: pinctrl: update uart/mmc bindings for MT7986 SoC |

Commit Message

Frank Wunderlich Oct. 24, 2022, 7:36 a.m. UTC
  From: Frank Wunderlich <frank-w@public-files.de>

Add new splitted uart pins and emmc_51.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
 .../bindings/pinctrl/mediatek,mt7986-pinctrl.yaml | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)
  

Comments

Krzysztof Kozlowski Oct. 25, 2022, 12:18 a.m. UTC | #1
On 24/10/2022 03:36, Frank Wunderlich wrote:
>            - if:
>                properties:
>                  function:
> @@ -221,8 +225,9 @@ patternProperties:
>              then:
>                properties:
>                  groups:
> -                  enum: [uart1_0, uart1_1, uart1_2, uart1_3_rx_tx,
> -                         uart1_3_cts_rts, uart2_0, uart2_1, uart0, uart1, uart2]
> +                  enum: [uart1_0, uart1_rx_tx, uart1_cts_rts, uart1_1, uart1_2_rx_tx, uart1_2_cts_rts,
> +                         uart1_3_rx_tx, uart1_3_cts_rts, uart2_0_rx_tx, uart2_0_cts_rts, uart2_1, uart0,
> +                         uart1, uart2]

Wrap it according to Linux coding style, so 80.

Best regards,
Krzysztof
  

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
index 89b8f3dd67a1..d5ab5e08badc 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
@@ -87,6 +87,8 @@  patternProperties:
           "wifi_led"        "led"       1, 2
           "i2c"             "i2c"       3, 4
           "uart1_0"         "uart"      7, 8, 9, 10
+          "uart1_rx_tx"     "uart"      42, 43
+          "uart1_cts_rts"   "uart"      44, 45
           "pcie_clk"        "pcie"      9
           "pcie_wake"       "pcie"      10
           "spi1_0"          "spi"       11, 12, 13, 14
@@ -98,9 +100,11 @@  patternProperties:
           "emmc_45"         "emmc"      22, 23, 24, 25, 26, 27, 28, 29, 30,
                                         31, 32
           "spi1_1"          "spi"       23, 24, 25, 26
-          "uart1_2"         "uart"      29, 30, 31, 32
+          "uart1_2_rx_tx"   "uart"      29, 30
+          "uart1_2_cts_rts" "uart"      31, 32
           "uart1_1"         "uart"      23, 24, 25, 26
-          "uart2_0"         "uart"      29, 30, 31, 32
+          "uart2_0_rx_tx"   "uart"      29, 30
+          "uart2_0_cts_rts" "uart"      31, 32
           "spi0"            "spi"       33, 34, 35, 36
           "spi0_wp_hold"    "spi"       37, 38
           "uart1_3_rx_tx"   "uart"      35, 36
@@ -157,7 +161,7 @@  patternProperties:
             then:
               properties:
                 groups:
-                  enum: [emmc, emmc_rst]
+                  enum: [emmc, emmc_rst, emmc_51]
           - if:
               properties:
                 function:
@@ -221,8 +225,9 @@  patternProperties:
             then:
               properties:
                 groups:
-                  enum: [uart1_0, uart1_1, uart1_2, uart1_3_rx_tx,
-                         uart1_3_cts_rts, uart2_0, uart2_1, uart0, uart1, uart2]
+                  enum: [uart1_0, uart1_rx_tx, uart1_cts_rts, uart1_1, uart1_2_rx_tx, uart1_2_cts_rts,
+                         uart1_3_rx_tx, uart1_3_cts_rts, uart2_0_rx_tx, uart2_0_cts_rts, uart2_1, uart0,
+                         uart1, uart2]
           - if:
               properties:
                 function: