From patchwork Fri Oct 21 22:18:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgecombe, Rick P" X-Patchwork-Id: 7016 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4242:0:0:0:0:0 with SMTP id s2csp927697wrr; Fri, 21 Oct 2022 15:21:11 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4cuyc5ZecmaHKyWDwRQKaxhcddzRRxlQXILqRTZYvRQ6HqoH5KshwG6EHjvQYzZaHmltuc X-Received: by 2002:a17:902:8a97:b0:178:1939:c721 with SMTP id p23-20020a1709028a9700b001781939c721mr21563069plo.108.1666390870913; Fri, 21 Oct 2022 15:21:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666390870; cv=none; d=google.com; s=arc-20160816; b=GSIyUaNnR+344ZZp7O4/JrZ4/iUTQ/ybTXw6gSF7A0mAhllou57QOVUxXRqQV7333e K1jmFjgNlHLpeBBao+TyaPdcwOamrsax4mkk/uJRq2sa7GrU3L5ercruPMPjERPlsHqb XEvSD8GXN9pNPqSA2T+nCnEA+K1kswXbezFlpuEG5hQi3+50ET65ncEQUM4/T6DEXt+u AIHItOyp3EZjYUiokSq7g1YxzJGJ70JMUa6OnpoV6Gc/6CaN7S7fihXNEWsXkq+cBiID AfqffnqlEwZK3SgRi5BLr0iXoxOJBvDGoCxkS78n8Xv9tHZj4Oj0GAtUKjcQDFYCHkYf Phig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=YNuJqoibrkRBVCiuCmQqQFAKxeA4/37t82P4OIJOqr8=; b=liaOxRkv3alu1twuaJEzc8Nl+hvhsD4vqS+z1gITl7Ccfn8BMxwWB0oY2T6odtoLEw 4U0TC1i0k85kNCWcDcA2P84m9BIczgeNMrjBRlL3a61DLPYrkfSXAsWhQ18XXFscTusP ZeKxGJM8CmS/HjNnUSacV7BmKthUdlOq/wMr2sV0vhMuhOSzKzTEPnhwIlD24u8Fqmdf i6Ls7ned7U/6emWPdDzA0Pv30PefPym73algY1qT1leg1Cv/S8RXgq2tytyqcJEDud9Y UI3LtFD/ipa0SO5NywXRnsKPXtRtUz8GPJqOVKlZMtu/NIQ1QuUn30KlkL0a0y4i9ef2 T7+Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="QCX/O45P"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t2-20020a056a0021c200b0054d5253e7d7si6274357pfj.190.2022.10.21.15.20.58; Fri, 21 Oct 2022 15:21:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="QCX/O45P"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229556AbiJUWTf (ORCPT + 99 others); Fri, 21 Oct 2022 18:19:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229850AbiJUWTM (ORCPT ); Fri, 21 Oct 2022 18:19:12 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 981DD2AAC00 for ; Fri, 21 Oct 2022 15:19:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666390743; x=1697926743; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=kNHtAX3mEHzTLo+VDVyWKv6DLaeRHOEsKonhUqzYgFQ=; b=QCX/O45PRyQc34qFv+UFzSnaH4L9dO43ZoM08ciKgBafJehsi+3dpXmo eR+RKHWE1Lx99MCafEiMId1wDrPnar3yN2lgDENBNCBr2CqtRbib+UGuC qnErhaBXn2U0S63lrwji7OUpsqXSOnY7faJ/Cn5f+7dTMuX5iVwfseSBP DUTVFORQU8HJHJP1MBeHsNYAIoZ1l4yd9DBYMWrHglsSWp7OH2edkKVJ/ I+TbUMTr49a6ZsrR5gd7rmpNKd4rorSeKussXcT9ismIeEXd+dGJRkAx5 bGZTcLWKHCKKwiZ6l796gX9NLGp1MUn4JTxvugdMglVluU3sFQud493k5 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10507"; a="369181095" X-IronPort-AV: E=Sophos;i="5.95,203,1661842800"; d="scan'208";a="369181095" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2022 15:18:37 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10507"; a="959808506" X-IronPort-AV: E=Sophos;i="5.95,203,1661842800"; d="scan'208";a="959808506" Received: from sanekar-mobl.amr.corp.intel.com (HELO rpedgeco-desk.amr.corp.intel.com) ([10.251.5.12]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2022 15:18:37 -0700 From: Rick Edgecombe To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, rick.p.edgecombe@intel.com, keescook@chromium.org, ebiederm@xmission.com Subject: [PATCH 2/2] x86: Improve formatting of user_regset arrays Date: Fri, 21 Oct 2022 15:18:03 -0700 Message-Id: <20221021221803.10910-3-rick.p.edgecombe@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221021221803.10910-1-rick.p.edgecombe@intel.com> References: <20221021221803.10910-1-rick.p.edgecombe@intel.com> X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747337473796269707?= X-GMAIL-MSGID: =?utf-8?q?1747337473796269707?= Back in 2018, Ingo Molnar suggested[0] to improve the formatting of the struct user_regset arrays. They have multiple member initializations per line and some lines exceed 100 chars. Reformat them like he suggested. [0] https://lore.kernel.org/lkml/20180711102035.GB8574@gmail.com/ Signed-off-by: Rick Edgecombe Reviewed-by: Kees Cook --- - Drop Kees' Reviewed-by, as I had to redo it with the new REGSET64_FOO format. arch/x86/kernel/ptrace.c | 107 ++++++++++++++++++++++++--------------- 1 file changed, 65 insertions(+), 42 deletions(-) diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index 356495ab37a6..dfaa270a7cc9 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c @@ -1235,28 +1235,37 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, static struct user_regset x86_64_regsets[] __ro_after_init = { [REGSET64_GENERAL] = { - .core_note_type = NT_PRSTATUS, - .n = sizeof(struct user_regs_struct) / sizeof(long), - .size = sizeof(long), .align = sizeof(long), - .regset_get = genregs_get, .set = genregs_set + .core_note_type = NT_PRSTATUS, + .n = sizeof(struct user_regs_struct) / sizeof(long), + .size = sizeof(long), + .align = sizeof(long), + .regset_get = genregs_get, + .set = genregs_set }, [REGSET64_FP] = { - .core_note_type = NT_PRFPREG, - .n = sizeof(struct fxregs_state) / sizeof(long), - .size = sizeof(long), .align = sizeof(long), - .active = regset_xregset_fpregs_active, .regset_get = xfpregs_get, .set = xfpregs_set + .core_note_type = NT_PRFPREG, + .n = sizeof(struct fxregs_state) / sizeof(long), + .size = sizeof(long), + .align = sizeof(long), + .active = regset_xregset_fpregs_active, + .regset_get = xfpregs_get, + .set = xfpregs_set }, [REGSET64_XSTATE] = { - .core_note_type = NT_X86_XSTATE, - .size = sizeof(u64), .align = sizeof(u64), - .active = xstateregs_active, .regset_get = xstateregs_get, - .set = xstateregs_set + .core_note_type = NT_X86_XSTATE, + .size = sizeof(u64), + .align = sizeof(u64), + .active = xstateregs_active, + .regset_get = xstateregs_get, + .set = xstateregs_set }, [REGSET64_IOPERM] = { - .core_note_type = NT_386_IOPERM, - .n = IO_BITMAP_LONGS, - .size = sizeof(long), .align = sizeof(long), - .active = ioperm_active, .regset_get = ioperm_get + .core_note_type = NT_386_IOPERM, + .n = IO_BITMAP_LONGS, + .size = sizeof(long), + .align = sizeof(long), + .active = ioperm_active, + .regset_get = ioperm_get }, }; @@ -1276,42 +1285,56 @@ static const struct user_regset_view user_x86_64_view = { #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION static struct user_regset x86_32_regsets[] __ro_after_init = { [REGSET32_GENERAL] = { - .core_note_type = NT_PRSTATUS, - .n = sizeof(struct user_regs_struct32) / sizeof(u32), - .size = sizeof(u32), .align = sizeof(u32), - .regset_get = genregs32_get, .set = genregs32_set + .core_note_type = NT_PRSTATUS, + .n = sizeof(struct user_regs_struct32) / sizeof(u32), + .size = sizeof(u32), + .align = sizeof(u32), + .regset_get = genregs32_get, + .set = genregs32_set }, [REGSET32_FP] = { - .core_note_type = NT_PRFPREG, - .n = sizeof(struct user_i387_ia32_struct) / sizeof(u32), - .size = sizeof(u32), .align = sizeof(u32), - .active = regset_fpregs_active, .regset_get = fpregs_get, .set = fpregs_set + .core_note_type = NT_PRFPREG, + .n = sizeof(struct user_i387_ia32_struct) / sizeof(u32), + .size = sizeof(u32), + .align = sizeof(u32), + .active = regset_fpregs_active, + .regset_get = fpregs_get, + .set = fpregs_set }, [REGSET32_XFP] = { - .core_note_type = NT_PRXFPREG, - .n = sizeof(struct fxregs_state) / sizeof(u32), - .size = sizeof(u32), .align = sizeof(u32), - .active = regset_xregset_fpregs_active, .regset_get = xfpregs_get, .set = xfpregs_set + .core_note_type = NT_PRXFPREG, + .n = sizeof(struct fxregs_state) / sizeof(u32), + .size = sizeof(u32), + .align = sizeof(u32), + .active = regset_xregset_fpregs_active, + .regset_get = xfpregs_get, + .set = xfpregs_set }, [REGSET32_XSTATE] = { - .core_note_type = NT_X86_XSTATE, - .size = sizeof(u64), .align = sizeof(u64), - .active = xstateregs_active, .regset_get = xstateregs_get, - .set = xstateregs_set + .core_note_type = NT_X86_XSTATE, + .size = sizeof(u64), + .align = sizeof(u64), + .active = xstateregs_active, + .regset_get = xstateregs_get, + .set = xstateregs_set }, [REGSET32_TLS] = { - .core_note_type = NT_386_TLS, - .n = GDT_ENTRY_TLS_ENTRIES, .bias = GDT_ENTRY_TLS_MIN, - .size = sizeof(struct user_desc), - .align = sizeof(struct user_desc), - .active = regset_tls_active, - .regset_get = regset_tls_get, .set = regset_tls_set + .core_note_type = NT_386_TLS, + .n = GDT_ENTRY_TLS_ENTRIES, + .bias = GDT_ENTRY_TLS_MIN, + .size = sizeof(struct user_desc), + .align = sizeof(struct user_desc), + .active = regset_tls_active, + .regset_get = regset_tls_get, + .set = regset_tls_set }, [REGSET32_IOPERM] = { - .core_note_type = NT_386_IOPERM, - .n = IO_BITMAP_BYTES / sizeof(u32), - .size = sizeof(u32), .align = sizeof(u32), - .active = ioperm_active, .regset_get = ioperm_get + .core_note_type = NT_386_IOPERM, + .n = IO_BITMAP_BYTES / sizeof(u32), + .size = sizeof(u32), + .align = sizeof(u32), + .active = ioperm_active, + .regset_get = ioperm_get }, };