From patchwork Fri Oct 21 17:29:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul T R X-Patchwork-Id: 6898 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4242:0:0:0:0:0 with SMTP id s2csp819292wrr; Fri, 21 Oct 2022 10:30:47 -0700 (PDT) X-Google-Smtp-Source: AMsMyM58ATw5kexC42RoV7gnTkTCcRjnK57kXOlrEPZZ9ulm+6KjzyCblM9pNo+B2dpXmM+WrJkL X-Received: by 2002:a17:902:e74e:b0:181:b25e:e7b8 with SMTP id p14-20020a170902e74e00b00181b25ee7b8mr20120463plf.10.1666373447293; Fri, 21 Oct 2022 10:30:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666373447; cv=none; d=google.com; s=arc-20160816; b=Z5Nfbxk/M7RJqLviI6IejazYIPqTpBgxGeUCJYWLoFEsGOQq7p6hgTKfGsHlPNW/p5 eXEuue6UPwt8/QZpFJsEjV1DURExCQBEzJvCSGBsbb5Dz+lLyNQRMrDpM2f30muwE9Yg TK30LY6FxtgNnLkPHLKLCweYXIXAKGeTh97KCUMlENNOVeFFbxNnZLmzDxfWxcngdKGV 7tx4s3vYFD8ENcVpRYkMNEsEUX7sLLXW+EF/69RQO0XJtDu/5m0BjHmnNN/GUpATmseP cgnVpxxsUOF3Pr7QgzsBsc+y+C3Ez7Tzv/wfO3HcL9yYJShr+PcN3NpIL3o8e0Xip8jd lqIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=H+400WbEgs8pgYPD1/ZsgQgRoenMrMlrjPucc3avcJE=; b=Gc9+/KMbsvrc3kCPNHmI+uyy8DNeYHUE479yr22j2mGE/ChMFysCJc40PkSxrQmC14 uQcA2z7e80O865Jy+gJ5nPKlTD93hhwWnShskTtyOnVq19yb3E8syph3HH3rwxx632AF xpauxD6cO7iMqSD2PYM61c/DQqvFFoBqna7NSSU5PYwG5aS2KJEEZMz5jDvHEiTEKpUD GAEU7BrOJyojzSystVQns2UTaVIWcbZGwXfYKAzsIGaqDzTOUExb5J2+ycxK46BwcKJY 3sgndT83bi3A/dQdpEOVBxT1iHCmY8pEhHxL6IyrDEiA5S7MmZ33m8gkJCEL+zXQdem9 N83g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=zOFgf5Gt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b13-20020a6541cd000000b004393c9493ecsi25975979pgq.568.2022.10.21.10.30.32; Fri, 21 Oct 2022 10:30:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=zOFgf5Gt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229608AbiJUR3v (ORCPT + 99 others); Fri, 21 Oct 2022 13:29:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51004 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230128AbiJUR3r (ORCPT ); Fri, 21 Oct 2022 13:29:47 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E84D34701; Fri, 21 Oct 2022 10:29:45 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29LHTcal036576; Fri, 21 Oct 2022 12:29:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666373378; bh=H+400WbEgs8pgYPD1/ZsgQgRoenMrMlrjPucc3avcJE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=zOFgf5GtXDfF6QzsEZ3z3l8Ycfws18Vpu6oVJBBJRzjWdWP00/jKFhoENlEgAFMiv nnWO0m6vWhssnogfg75us+0x/9FiGB1a2fffzxNepFud1RP0wxVuTikcNnLnTB+2R+ bRXRXFsHTNVdZRPh2X8ikM0uyZC7j7HPhq36vGjo= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29LHTcMp107183 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 21 Oct 2022 12:29:38 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Fri, 21 Oct 2022 12:29:37 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Fri, 21 Oct 2022 12:29:37 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29LHTajF015198; Fri, 21 Oct 2022 12:29:37 -0500 From: Rahul T R To: CC: , , , , , , , , Subject: [PATCH v6 1/2] arm64: dts: ti: k3-j721e-*: Add dts nodes for EHRPWMs Date: Fri, 21 Oct 2022 22:59:31 +0530 Message-ID: <20221021172932.16731-2-r-ravikumar@ti.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20221021172932.16731-1-r-ravikumar@ti.com> References: <20221021172932.16731-1-r-ravikumar@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747319204103711944?= X-GMAIL-MSGID: =?utf-8?q?1747319204103711944?= From: Vijay Pothukuchi Add dts nodes for 6 EHRPWM instances on SoC Signed-off-by: Vijay Pothukuchi Signed-off-by: Rahul T R --- .../dts/ti/k3-j721e-common-proc-board.dts | 24 +++++++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 62 ++++++++++++++++++- arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 24 +++++++ 3 files changed, 109 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index b1691ac3442d..4f8ab839fbc4 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -995,3 +995,27 @@ &main_mcan12 { &main_mcan13 { status = "disabled"; }; + +&main_ehrpwm0 { + status = "disabled"; +}; + +&main_ehrpwm1 { + status = "disabled"; +}; + +&main_ehrpwm2 { + status = "disabled"; +}; + +&main_ehrpwm3 { + status = "disabled"; +}; + +&main_ehrpwm4 { + status = "disabled"; +}; + +&main_ehrpwm5 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 917c9dc99efa..2027c724a2d6 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -66,7 +66,67 @@ usb_serdes_mux: mux-controller@4000 { #mux-control-cells = <1>; mux-reg-masks = <0x4000 0x8000000>, /* USB0 to SERDES0/3 mux */ <0x4010 0x8000000>; /* USB1 to SERDES1/2 mux */ - }; + }; + + ehrpwm_tbclk: clock-controller@4140 { + compatible = "ti,am654-ehrpwm-tbclk", "syscon"; + reg = <0x4140 0x18>; + #clock-cells = <1>; + }; + }; + + main_ehrpwm0: pwm@3000000 { + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm"; + #pwm-cells = <3>; + reg = <0x00 0x3000000 0x00 0x100>; + power-domains = <&k3_pds 83 TI_SCI_PD_EXCLUSIVE>; + clocks = <&ehrpwm_tbclk 0>, <&k3_clks 83 0>; + clock-names = "tbclk", "fck"; + }; + + main_ehrpwm1: pwm@3010000 { + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm"; + #pwm-cells = <3>; + reg = <0x00 0x3010000 0x00 0x100>; + power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>; + clocks = <&ehrpwm_tbclk 1>, <&k3_clks 84 0>; + clock-names = "tbclk", "fck"; + }; + + main_ehrpwm2: pwm@3020000 { + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm"; + #pwm-cells = <3>; + reg = <0x00 0x3020000 0x00 0x100>; + power-domains = <&k3_pds 85 TI_SCI_PD_EXCLUSIVE>; + clocks = <&ehrpwm_tbclk 2>, <&k3_clks 85 0>; + clock-names = "tbclk", "fck"; + }; + + main_ehrpwm3: pwm@3030000 { + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm"; + #pwm-cells = <3>; + reg = <0x00 0x3030000 0x00 0x100>; + power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>; + clocks = <&ehrpwm_tbclk 3>, <&k3_clks 86 0>; + clock-names = "tbclk", "fck"; + }; + + main_ehrpwm4: pwm@3040000 { + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm"; + #pwm-cells = <3>; + reg = <0x00 0x3040000 0x00 0x100>; + power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>; + clocks = <&ehrpwm_tbclk 4>, <&k3_clks 87 0>; + clock-names = "tbclk", "fck"; + }; + + main_ehrpwm5: pwm@3050000 { + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm"; + #pwm-cells = <3>; + reg = <0x00 0x3050000 0x00 0x100>; + power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>; + clocks = <&ehrpwm_tbclk 5>, <&k3_clks 88 0>; + clock-names = "tbclk", "fck"; }; gic500: interrupt-controller@1800000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts index 80358cba6954..98a55778f3fe 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -1129,3 +1129,27 @@ &c71_0 { memory-region = <&c71_0_dma_memory_region>, <&c71_0_memory_region>; }; + +&main_ehrpwm0 { + status = "disabled"; +}; + +&main_ehrpwm1 { + status = "disabled"; +}; + +&main_ehrpwm2 { + status = "disabled"; +}; + +&main_ehrpwm3 { + status = "disabled"; +}; + +&main_ehrpwm4 { + status = "disabled"; +}; + +&main_ehrpwm5 { + status = "disabled"; +};