[2/4] arm64: boot: dts: msm8996: add blsp1_i2c6 node
Commit Message
Add support for the sixth I2C interface on the MSM8996 SoC.
Signed-off-by: Harry Austen <hpausten@protonmail.com>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 31 +++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
--
2.38.1
Comments
On 21/10/2022 10:24, Harry Austen wrote:
> Add support for the sixth I2C interface on the MSM8996 SoC.
>
> Signed-off-by: Harry Austen <hpausten@protonmail.com>
> ---
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 31 +++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 80590267dfd0..70c0eae17360 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -1400,6 +1400,20 @@ pwdn {
> };
> };
>
> + blsp1_i2c6_default: blsp1_i2c6 {
No underscores in node names.
Missing "state" suffix. See:
https://lore.kernel.org/linux-arm-msm/20221018155721.47140-1-krzysztof.kozlowski@linaro.org/
Bindings are already in next.
Does not look like you tested the DTS against bindings. Please run `make
dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst
for instructions).
> + pins = "gpio27", "gpio28";
> + function = "blsp_i2c6";
> + drive-strength = <16>;
> + bias-disable;
> + };
> +
> + blsp1_i2c6_sleep: blsp1_i2c6_sleep {
> + pins = "gpio27", "gpio28";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
Best regards,
Krzysztof
@@ -1400,6 +1400,20 @@ pwdn {
};
};
+ blsp1_i2c6_default: blsp1_i2c6 {
+ pins = "gpio27", "gpio28";
+ function = "blsp_i2c6";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ blsp1_i2c6_sleep: blsp1_i2c6_sleep {
+ pins = "gpio27", "gpio28";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
pcie0_state_on: pcie0-state-on {
perst {
pins = "gpio35";
@@ -3127,6 +3141,23 @@ blsp1_i2c3: i2c@7577000 {
status = "disabled";
};
+ blsp1_i2c6: i2c@757a000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x757a000 0x1000>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&blsp1_i2c6_default>;
+ pinctrl-1 = <&blsp1_i2c6_sleep>;
+ dmas = <&blsp1_dma 22>, <&blsp1_dma 23>;
+ dma-names = "tx", "rx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
blsp2_dma: dma-controller@7584000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x07584000 0x2b000>;