From patchwork Wed Oct 19 17:32:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 5788 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp452252wrs; Wed, 19 Oct 2022 10:38:33 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7rl+sfrL5u8IJXBTzWYwUTxO4U6Wop/kndH4V4tc7cFx1wyoJEJxN4x18VzxCy6Pd12jY1 X-Received: by 2002:a17:907:d04:b0:76e:e208:27ba with SMTP id gn4-20020a1709070d0400b0076ee20827bamr7992401ejc.652.1666201113672; Wed, 19 Oct 2022 10:38:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666201113; cv=none; d=google.com; s=arc-20160816; b=lDsgiByHOoZ7pij3Mgmzrk+CaJ8ZHi5PT/tjFEF5FHULzRS1G0Wwm593872D2Gjvp7 G3wbk/9FpASCOVOsKJKeWvSzBG/5QJK717L8ZS2Sw8jjkibrtvI/s/uyun38udNz8C9F gkjALbCYAzm3EO6R+zVRgV2kgVfQntLIPw/BwPPMl/vq5+ZP13n5Qf4ayl+CeZ/5amkl V3SDWtiuQrSv5yyCnTuFbT7XiHZm7k6HMsSXXcxnqaPse+1X7OIh9Xb+fXjLgGR+eN8F VrZxtM1K/DP5F/T83i/55/Dz6dTzaSvrf76fqtLbDhfAeUAQoy+saRlmsgHCSKYjjxQ2 f6BQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+0SYbttWEjnSNgY9JDD51A1Ms/+g73ZNZSo/fI60Yj0=; b=eiaae2lFkPTbqkagk+FcOWoORuDq+vehp176Zv+Xd6pfgVhia/em8ja7+ST3fMbvOE 0hxV+s5l4TlusRVC6GC7I5E6VjULPbqmnQr6pNzqXjnl17Cyp+dTqjoJSI3SMY2Ls+RC tciiQFSI5o+u4Ne1JmQwcG9UpHu+pms3/sKG5K3VS5QvSO0gLwTTKkZ6vhMY+ged9sWh J+FS5UWG5P09Xq7zAxQ3BjziB7wwdanIyWHgdUDk2mq2kE1ckw0rrh7LOwJcT9bF29i+ lJf8YjIVZN59ZNfLcI1Jz967WR+lu/sIf49f1IMfdKkVjx60n4hA/+WQy/UFKSruNODj gTUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=IVcznIwZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id gs17-20020a1709072d1100b0078d27c1b499si18725166ejc.500.2022.10.19.10.38.08; Wed, 19 Oct 2022 10:38:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=IVcznIwZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231297AbiJSRev (ORCPT + 99 others); Wed, 19 Oct 2022 13:34:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33712 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231504AbiJSReQ (ORCPT ); Wed, 19 Oct 2022 13:34:16 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 347D21D3473; Wed, 19 Oct 2022 10:34:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666200850; x=1697736850; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1PhDcr2XGs8uIfUaec8gKHHe5Qyfm3zBRnEHtyvj3RQ=; b=IVcznIwZ5QqLvgB7+xhCORjk2JBODXlTGjC2Gv19V7X4oqGukeYnJMAz yCts2qL9vgUVaCxK7nrqHnu4wjqFR0eOWHFk8ncoeGLG+RAfmNd0Im/Rv xeFItnQyK5JiCr9BNQWYjpu9a+y3UVpQfB2nUl5RWI4SiZbZZ39rpMvlR 68D9ft49KUHYaTkL1CWV8UZ6mmkbgdwM6TIud07R6GGr89oMX9onTX9MX 2WK/ItwN56NF0Yz1AZ+wFlKmDy1psGXqbeyVwWCgWmZ+iv+WoLwv0WYIL lizBTLo8T95KuhnxtcGBBhkr75CtSI5wPUKu05mZX2hfMOTV6MAjuLxN1 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10505"; a="306474481" X-IronPort-AV: E=Sophos;i="5.95,196,1661842800"; d="scan'208";a="306474481" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Oct 2022 10:33:50 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10505"; a="607204795" X-IronPort-AV: E=Sophos;i="5.95,196,1661842800"; d="scan'208";a="607204795" Received: from mjmcener-mobl1.amr.corp.intel.com (HELO localhost.localdomain) ([10.213.233.40]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Oct 2022 10:33:46 -0700 From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Cc: cgroups@vger.kernel.org, linux-kernel@vger.kernel.org, Tejun Heo , Johannes Weiner , Zefan Li , Dave Airlie , Daniel Vetter , Rob Clark , =?utf-8?q?St=C3=A9phane_Marchesin?= , "T . J . Mercier" , Kenny.Ho@amd.com, =?utf-8?q?Chris?= =?utf-8?q?tian_K=C3=B6nig?= , Brian Welty , Tvrtko Ursulin Subject: [RFC 09/17] cgroup/drm: Introduce weight based drm cgroup control Date: Wed, 19 Oct 2022 18:32:46 +0100 Message-Id: <20221019173254.3361334-10-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221019173254.3361334-1-tvrtko.ursulin@linux.intel.com> References: <20221019173254.3361334-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HK_RANDOM_ENVFROM,HK_RANDOM_FROM, RCVD_IN_DNSWL_HI,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747138499099062547?= X-GMAIL-MSGID: =?utf-8?q?1747138499099062547?= From: Tvrtko Ursulin Similar to CPU scheduling, implement a concept of weight in the drm cgroup controller. Uses the same range and default as the CPU controller - CGROUP_WEIGHT_MIN, CGROUP_WEIGHT_DFL and CGROUP_WEIGHT_MAX. Later each cgroup is assigned a time budget proportionaly based on the relative weights of it's siblings. This time budget is in turn split by the group's children and so on. Children of the root cgroup will be exempt from split budgets and therefore compete for the GPU time independently and without weight based control. This will be used to implement a soft, or best effort signal from drm cgroup to drm core notifying about groups which are over their allotted budget. No guarantees that the limit can be enforced are provided or implied. Signed-off-by: Tvrtko Ursulin --- kernel/cgroup/drm.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/kernel/cgroup/drm.c b/kernel/cgroup/drm.c index 01954c3a2087..4b6f88d8236e 100644 --- a/kernel/cgroup/drm.c +++ b/kernel/cgroup/drm.c @@ -17,6 +17,7 @@ struct drm_cgroup_state { int priority; int effective_priority; + unsigned int weight; }; static DEFINE_MUTEX(drmcg_mutex); @@ -163,6 +164,33 @@ drmcs_write_priority(struct cgroup_subsys_state *css, struct cftype *cftype, return 0; } +static u64 +drmcs_read_weight(struct cgroup_subsys_state *css, struct cftype *cft) +{ + struct drm_cgroup_state *drmcs = css_to_drmcs(css); + + return drmcs->weight; +} + +static int +drmcs_write_weight(struct cgroup_subsys_state *css, struct cftype *cftype, + u64 weight) +{ + struct drm_cgroup_state *drmcs = css_to_drmcs(css); + int ret; + + if (weight < CGROUP_WEIGHT_MIN || weight > CGROUP_WEIGHT_MAX) + return -ERANGE; + + ret = mutex_lock_interruptible(&drmcg_mutex); + if (ret) + return ret; + drmcs->weight = weight; + mutex_unlock(&drmcg_mutex); + + return 0; +} + static int drmcs_online(struct cgroup_subsys_state *css) { struct drm_cgroup_state *drmcs = css_to_drmcs(css); @@ -210,6 +238,8 @@ drmcs_alloc(struct cgroup_subsys_state *parent_css) if (!drmcs) return ERR_PTR(-ENOMEM); + drmcs->weight = CGROUP_WEIGHT_DFL; + return &drmcs->css; } @@ -230,6 +260,12 @@ struct cftype files[] = { .flags = CFTYPE_NOT_ON_ROOT, .read_s64 = drmcs_read_effective_priority, }, + { + .name = "weight", + .flags = CFTYPE_NOT_ON_ROOT, + .read_u64 = drmcs_read_weight, + .write_u64 = drmcs_write_weight, + }, { } /* Zero entry terminates. */ };