Message ID | 20221019145246.v2.4.I7d01f9ad11bacdc9213dee61b7918982aea39115@changeid |
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State | New |
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Series |
mmc: sdhci controllers: Fix SDHCI_RESET_ALL for CQHCI
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Commit Message
Brian Norris
Oct. 19, 2022, 9:54 p.m. UTC
[[ NOTE: this is completely untested by the author, but included solely
because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix
SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
drivers using CQHCI might benefit from a similar change, if they
also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
bug on at least MSM, Arasan, and Intel hardware. ]]
SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
tracking that properly in software. When out of sync, we may trigger
various timeouts.
It's not typical to perform resets while CQE is enabled, but this may
occur in some suspend or error recovery scenarios.
Fixes: bb6e358169bf ("mmc: sdhci-esdhc-imx: add CMDQ support")
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
Changes in v2:
- Drop unnecessary ESDHC_FLAG_CQHCI check
drivers/mmc/host/sdhci-esdhc-imx.c | 3 +++
1 file changed, 3 insertions(+)
Comments
> -----Original Message----- > From: Brian Norris <briannorris@chromium.org> > Sent: 2022年10月20日 5:55 > To: Ulf Hansson <ulf.hansson@linaro.org> > Cc: Shawn Lin <shawn.lin@rock-chips.com>; Shawn Guo > <shawnguo@kernel.org>; Fabio Estevam <festevam@gmail.com>; Bough Chen > <haibo.chen@nxp.com>; Broadcom internal kernel review list > <bcm-kernel-feedback-list@broadcom.com>; dl-linux-imx <linux-imx@nxp.com>; > Pengutronix Kernel Team <kernel@pengutronix.de>; Florian Fainelli > <f.fainelli@gmail.com>; Michal Simek <michal.simek@xilinx.com>; Faiz Abbas > <faiz_abbas@ti.com>; linux-mmc@vger.kernel.org; Jonathan Hunter > <jonathanh@nvidia.com>; Al Cooper <alcooperx@gmail.com>; > linux-arm-kernel@lists.infradead.org; Sowjanya Komatineni > <skomatineni@nvidia.com>; linux-kernel@vger.kernel.org; Thierry Reding > <thierry.reding@gmail.com>; Adrian Hunter <adrian.hunter@intel.com>; > Sascha Hauer <s.hauer@pengutronix.de>; Brian Norris > <briannorris@chromium.org> > Subject: [PATCH v2 4/7] mms: sdhci-esdhc-imx: Fix SDHCI_RESET_ALL for CQHCI > > [[ NOTE: this is completely untested by the author, but included solely > because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix > SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other > drivers using CQHCI might benefit from a similar change, if they > also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same > bug on at least MSM, Arasan, and Intel hardware. ]] > > SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't > tracking that properly in software. When out of sync, we may trigger various > timeouts. > > It's not typical to perform resets while CQE is enabled, but this may occur in > some suspend or error recovery scenarios. > > Fixes: bb6e358169bf ("mmc: sdhci-esdhc-imx: add CMDQ support") > Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Haibo Chen <haibo.chen@nxp.com> > --- > > Changes in v2: > - Drop unnecessary ESDHC_FLAG_CQHCI check > > drivers/mmc/host/sdhci-esdhc-imx.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c > b/drivers/mmc/host/sdhci-esdhc-imx.c > index 55981b0f0b10..c07df7b71b22 100644 > --- a/drivers/mmc/host/sdhci-esdhc-imx.c > +++ b/drivers/mmc/host/sdhci-esdhc-imx.c > @@ -1288,6 +1288,9 @@ static void esdhc_set_uhs_signaling(struct sdhci_host > *host, unsigned timing) > > static void esdhc_reset(struct sdhci_host *host, u8 mask) { > + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & > SDHCI_RESET_ALL)) > + cqhci_deactivate(host->mmc); > + > sdhci_reset(host, mask); > > sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); > -- > 2.38.0.413.g74048e4d9e-goog
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 55981b0f0b10..c07df7b71b22 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1288,6 +1288,9 @@ static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing) static void esdhc_reset(struct sdhci_host *host, u8 mask) { + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);