From patchwork Mon Oct 17 17:12:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 3615 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1557681wrs; Mon, 17 Oct 2022 10:16:32 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6xrekP3HExWlsBfhe7uzHMH5cs+uWPmTvE7Lq0dyTsR4qMBlAZWN787SFshhMDt2ojf5Lz X-Received: by 2002:a17:903:40c3:b0:180:cfb7:827b with SMTP id t3-20020a17090340c300b00180cfb7827bmr12984279pld.0.1666026992308; Mon, 17 Oct 2022 10:16:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666026992; cv=none; d=google.com; s=arc-20160816; b=QZ2UW8PhKZZnurVXOyUG1HUO4xMJVxNhG8zjEltoOcoQ1yWkmZUwiqgjxbc0Wd9Qbb RwIDbYG41726/fLQyhYZ8Dqkdobz87NxTe6HK/nLgkyOrCVTuS6tGPCLu/B1JnxHoiXG Lkkku1zw6cV2oYwfbCi+EEeBSYs+wQwCh6Bge7qnDfJfhCtKEDj68WP7ryvQTj3MeKjN /JJH0W/FBwN9sXOij6XPinMBjiN+u0BBhoJwyxoS2942ib4WHV2Tv10PhOLSQ4BhK8/h Y7b8MX3R717Yz+/xj5iM2KSDBcs6zCSpDF1RgndCibuDU/nlqZs5hyD0w402bunLGIL3 uBcA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wrjFeUcgSX6FabgS6Q66GklLRP1b4SA7UoMmA9jsAZ4=; b=zWD5YFxQPJWoS6K/Ni7btC3xsf0uYHHIvv0CJldeh/V6R6lUUniumLvMuLmrwRTS75 rOFBJT8hQSSHRREG2xLrey4+SWlg2VFnzr4HHfRSB0ZACOmLauHXfY/UB1XkD5BTGgLW pyRyRXaJ3R++uZ5sEh9fTiEWN/zhlhLqrhc3WmA3lkK6diF9jgGt7p9igQQUIIfl3vIF xdoxs0A3Mt2w1gfAiyPlBC7FAelnVlux81xu1o+D8cA+HJ4hdJ2yo2bJMb0wPLyTG2VK iTS0YFCNHhISPl2p4jrwvIdZZ8b1akAnzQ5a88UoyHvxt+twsHSLb/sZtBVpW1Ujhy0S 95Ng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=cXwuZBNp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s9-20020a17090302c900b0017f5ea214a8si12802905plk.462.2022.10.17.10.16.18; Mon, 17 Oct 2022 10:16:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=cXwuZBNp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230120AbiJQRMk (ORCPT + 99 others); Mon, 17 Oct 2022 13:12:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50484 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230003AbiJQRMb (ORCPT ); Mon, 17 Oct 2022 13:12:31 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A17E67059; Mon, 17 Oct 2022 10:12:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666026750; x=1697562750; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tLH6McL/k+1AdtQX5dfk1xHgIg0bo2xOAuTSBmeqVyU=; b=cXwuZBNpqcYISgJElNqP/f2pbda/zGrv4u+YTI+3W4W/JpnfH/D6QYn0 U27eeHCItuJby/DLHatisO9ThrDYveOCFkqAgjV5+v+HGCB/l8sGMUsh9 wb2nyFSCv0589ejMtXSU3DvJCAof4niaGZu95kLl/LZDg/U1nBxvN+wQ0 y4SQLMMDXz5aLkPVZzVgd+wKO5EUphScCV/1YhaIwEe3jLL5yNxctcCxh RrYpy+wBnr7Ei9BadNUX5Q8zgBCijBQd6A6IDe4gYsSVBcMJDkg2pBEhG 6c1DJ3EMCwucXGXsgfrjc8hR1RmYl6lUJG4YMAbUnA69YiyX5sqbvBv5V g==; X-IronPort-AV: E=McAfee;i="6500,9779,10503"; a="305849456" X-IronPort-AV: E=Sophos;i="5.95,192,1661842800"; d="scan'208";a="305849456" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2022 10:12:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10503"; a="957417119" X-IronPort-AV: E=Sophos;i="5.95,192,1661842800"; d="scan'208";a="957417119" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga005.fm.intel.com with ESMTP; 17 Oct 2022 10:12:28 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id C0D9243F; Mon, 17 Oct 2022 20:12:49 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Daniel Mack , Haojian Zhuang , Robert Jarzmik , Mark Brown Subject: [PATCH v1 3/6] spi: pxa2xx: Remove no more needed PCI ID table Date: Mon, 17 Oct 2022 20:12:40 +0300 Message-Id: <20221017171243.57078-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221017171243.57078-1-andriy.shevchenko@linux.intel.com> References: <20221017171243.57078-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746955919618578088?= X-GMAIL-MSGID: =?utf-8?q?1746955919618578088?= Since the PCI enumerated devices provide a property with SSP type, there is no more necessity to bear the copy of the ID table here. Remove it for good. Signed-off-by: Andy Shevchenko --- drivers/spi/spi-pxa2xx.c | 117 +-------------------------------------- 1 file changed, 2 insertions(+), 115 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 857732a54ca7..1d36d055a9d6 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include @@ -1335,121 +1334,17 @@ static const struct acpi_device_id pxa2xx_spi_acpi_match[] = { MODULE_DEVICE_TABLE(acpi, pxa2xx_spi_acpi_match); #endif -/* - * PCI IDs of compound devices that integrate both host controller and private - * integrated DMA engine. Please note these are not used in module - * autoloading and probing in this module but matching the LPSS SSP type. - */ -static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = { - /* SPT-LP */ - { PCI_VDEVICE(INTEL, 0x9d29), LPSS_SPT_SSP }, - { PCI_VDEVICE(INTEL, 0x9d2a), LPSS_SPT_SSP }, - /* SPT-H */ - { PCI_VDEVICE(INTEL, 0xa129), LPSS_SPT_SSP }, - { PCI_VDEVICE(INTEL, 0xa12a), LPSS_SPT_SSP }, - /* KBL-H */ - { PCI_VDEVICE(INTEL, 0xa2a9), LPSS_SPT_SSP }, - { PCI_VDEVICE(INTEL, 0xa2aa), LPSS_SPT_SSP }, - /* CML-V */ - { PCI_VDEVICE(INTEL, 0xa3a9), LPSS_SPT_SSP }, - { PCI_VDEVICE(INTEL, 0xa3aa), LPSS_SPT_SSP }, - /* BXT A-Step */ - { PCI_VDEVICE(INTEL, 0x0ac2), LPSS_BXT_SSP }, - { PCI_VDEVICE(INTEL, 0x0ac4), LPSS_BXT_SSP }, - { PCI_VDEVICE(INTEL, 0x0ac6), LPSS_BXT_SSP }, - /* BXT B-Step */ - { PCI_VDEVICE(INTEL, 0x1ac2), LPSS_BXT_SSP }, - { PCI_VDEVICE(INTEL, 0x1ac4), LPSS_BXT_SSP }, - { PCI_VDEVICE(INTEL, 0x1ac6), LPSS_BXT_SSP }, - /* GLK */ - { PCI_VDEVICE(INTEL, 0x31c2), LPSS_BXT_SSP }, - { PCI_VDEVICE(INTEL, 0x31c4), LPSS_BXT_SSP }, - { PCI_VDEVICE(INTEL, 0x31c6), LPSS_BXT_SSP }, - /* ICL-LP */ - { PCI_VDEVICE(INTEL, 0x34aa), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x34ab), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x34fb), LPSS_CNL_SSP }, - /* EHL */ - { PCI_VDEVICE(INTEL, 0x4b2a), LPSS_BXT_SSP }, - { PCI_VDEVICE(INTEL, 0x4b2b), LPSS_BXT_SSP }, - { PCI_VDEVICE(INTEL, 0x4b37), LPSS_BXT_SSP }, - /* JSL */ - { PCI_VDEVICE(INTEL, 0x4daa), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x4dab), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x4dfb), LPSS_CNL_SSP }, - /* TGL-H */ - { PCI_VDEVICE(INTEL, 0x43aa), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x43ab), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x43fb), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x43fd), LPSS_CNL_SSP }, - /* ADL-P */ - { PCI_VDEVICE(INTEL, 0x51aa), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x51ab), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x51fb), LPSS_CNL_SSP }, - /* ADL-M */ - { PCI_VDEVICE(INTEL, 0x54aa), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x54ab), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x54fb), LPSS_CNL_SSP }, - /* APL */ - { PCI_VDEVICE(INTEL, 0x5ac2), LPSS_BXT_SSP }, - { PCI_VDEVICE(INTEL, 0x5ac4), LPSS_BXT_SSP }, - { PCI_VDEVICE(INTEL, 0x5ac6), LPSS_BXT_SSP }, - /* RPL-S */ - { PCI_VDEVICE(INTEL, 0x7a2a), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x7a2b), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x7a79), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x7a7b), LPSS_CNL_SSP }, - /* ADL-S */ - { PCI_VDEVICE(INTEL, 0x7aaa), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x7aab), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x7af9), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x7afb), LPSS_CNL_SSP }, - /* MTL-P */ - { PCI_VDEVICE(INTEL, 0x7e27), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x7e30), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x7e46), LPSS_CNL_SSP }, - /* CNL-LP */ - { PCI_VDEVICE(INTEL, 0x9daa), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x9dab), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x9dfb), LPSS_CNL_SSP }, - /* CNL-H */ - { PCI_VDEVICE(INTEL, 0xa32a), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0xa32b), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0xa37b), LPSS_CNL_SSP }, - /* CML-LP */ - { PCI_VDEVICE(INTEL, 0x02aa), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x02ab), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x02fb), LPSS_CNL_SSP }, - /* CML-H */ - { PCI_VDEVICE(INTEL, 0x06aa), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x06ab), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0x06fb), LPSS_CNL_SSP }, - /* TGL-LP */ - { PCI_VDEVICE(INTEL, 0xa0aa), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0xa0ab), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0xa0de), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0xa0df), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0xa0fb), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0xa0fd), LPSS_CNL_SSP }, - { PCI_VDEVICE(INTEL, 0xa0fe), LPSS_CNL_SSP }, - { }, -}; - static const struct of_device_id pxa2xx_spi_of_match[] = { { .compatible = "marvell,mmp2-ssp", .data = (void *)MMP2_SSP }, {}, }; MODULE_DEVICE_TABLE(of, pxa2xx_spi_of_match); -#ifdef CONFIG_PCI - static bool pxa2xx_spi_idma_filter(struct dma_chan *chan, void *param) { return param == chan->device->dev; } -#endif /* CONFIG_PCI */ - static struct pxa2xx_spi_controller * pxa2xx_spi_init_pdata(struct platform_device *pdev) { @@ -1458,17 +1353,12 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) struct device *parent = dev->parent; struct ssp_device *ssp; struct resource *res; - struct pci_dev *pcidev = dev_is_pci(parent) ? to_pci_dev(parent) : NULL; - const struct pci_device_id *pcidev_id = NULL; u32 value = SSP_UNDEFINED; enum pxa_ssp_type type; const void *match; int status; u64 uid; - if (pcidev) - pcidev_id = pci_match_id(pxa2xx_spi_pci_compound_match, pcidev); - /* Always try to read property */ device_property_read_u32(&pdev->dev, "intel,spi-pxa2xx-type", &value); @@ -1477,8 +1367,6 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) type = (enum pxa_ssp_type)match; else if (value > SSP_UNDEFINED && value < SSP_MAX) type = (enum pxa_ssp_type)value; - else if (pcidev_id) - type = (enum pxa_ssp_type)pcidev_id->driver_data; else return ERR_PTR(-EINVAL); @@ -1494,13 +1382,12 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) ssp->phys_base = res->start; -#ifdef CONFIG_PCI - if (pcidev_id) { + /* Platforms with iDMA 64-bit */ + if (platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpss_priv")) { pdata->tx_param = parent; pdata->rx_param = parent; pdata->dma_filter = pxa2xx_spi_idma_filter; } -#endif ssp->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(ssp->clk))