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[2620:137:e000::1:20]) by mx.google.com with ESMTP id mw6-20020a17090b4d0600b0020d4dc7fa9dsi20653242pjb.84.2022.10.17.07.59.59; Mon, 17 Oct 2022 08:00:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HsYjrlBY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231589AbiJQO7a (ORCPT + 99 others); Mon, 17 Oct 2022 10:59:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231555AbiJQO6T (ORCPT ); Mon, 17 Oct 2022 10:58:19 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 709A46AEB4; Mon, 17 Oct 2022 07:55:34 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id EEF3E611BD; Mon, 17 Oct 2022 14:54:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 12F91C4FF14; Mon, 17 Oct 2022 14:54:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1666018479; bh=b6g3IRC2VLW8pGIqTKc6QbcYPDAMiTd4VIfKnkmOhF4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HsYjrlBYKvKthcfMQ67HXz4YWIbGrayzNQLCavxUdKyrI8tTAqRhYzow0SJdnQU+t J8gUyMZqCkG4XGjIj73LPuZ0BHW5JwE/0xT1ICdzYDUtR5lnSGzh7TvzoZntU43tp7 vecdn1g+i1+JpIolVQ+N3QWjrU/aiq5M8rp9/LmzevP1+NlwyrKMJN0W3B3A8w1e3w dIo/dq2cpsDH/f+Zse+LrOv+7JsGg+ErF17RFOIEdV4Rs65vWAaVTCNqaOnBOTeyii AQQ7LZwN90+5yezf21s4n1MNUoXbrCVL/Kg9Cfu2bLnZcsaXlRDLt7Y87uVagpUKQb iBKZoNMH/g/CQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1okRVd-0005mK-8D; Mon, 17 Oct 2022 16:54:29 +0200 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 09/15] dt-bindings: phy: qcom,qmp-pcie: mark current bindings as legacy Date: Mon, 17 Oct 2022 16:53:22 +0200 Message-Id: <20221017145328.22090-10-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221017145328.22090-1-johan+linaro@kernel.org> References: <20221017145328.22090-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746947343384786366?= X-GMAIL-MSGID: =?utf-8?q?1746947343384786366?= The current QMP PCIe PHY bindings are based on the original MSM8996 binding which provided multiple PHYs per IP block and these in turn were described by child nodes. Later QMP PCIe PHY blocks only provide a single PHY and the remnant child node does not really reflect the hardware. The original MSM8996 binding also ended up describing the individual register blocks as belonging to either the wrapper node or the PHY child nodes. This is an unnecessary level of detail which has lead to problems when later IP blocks using different register layouts have been forced to fit the original mould rather than updating the binding. The bindings are arguable also incomplete as they only the describe register blocks used by the current Linux drivers (e.g. does not include the per lane PCS registers). In preparation for adding new bindings for SC8280XP which further bindings can be based on, mark the current bindings as "legacy". Signed-off-by: Johan Hovold --- .../{qcom,qmp-pcie-phy.yaml => qcom,qmp-pcie-phy-legacy.yaml} | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) rename Documentation/devicetree/bindings/phy/{qcom,qmp-pcie-phy.yaml => qcom,qmp-pcie-phy-legacy.yaml} (98%) diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy-legacy.yaml similarity index 98% rename from Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml rename to Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy-legacy.yaml index 324ad7d03a38..2ea880f8c099 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy-legacy.yaml @@ -1,10 +1,10 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/phy/qcom,qmp-pcie-phy.yaml# +$id: http://devicetree.org/schemas/phy/qcom,qmp-pcie-phy-legacy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm QMP PHY controller (PCIe) +title: Qualcomm QMP PHY controller (PCIe legacy bindings) maintainers: - Vinod Koul