This is a sdhci version of mmc's uhs2_[enable|disable]_clk operations.
Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
---
drivers/mmc/host/sdhci-uhs2.c | 36 +++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
@@ -11,6 +11,7 @@
*/
#include <linux/delay.h>
+#include <linux/ktime.h>
#include <linux/module.h>
#include "sdhci.h"
@@ -403,6 +404,37 @@ int sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
return 0;
}
+static int sdhci_uhs2_disable_clk(struct mmc_host *mmc)
+{
+ struct sdhci_host *host = mmc_priv(mmc);
+ u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+
+ clk &= ~SDHCI_CLOCK_CARD_EN;
+ sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+ return 0;
+}
+
+static int sdhci_uhs2_enable_clk(struct mmc_host *mmc)
+{
+ struct sdhci_host *host = mmc_priv(mmc);
+ u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+ u32 val;
+ /* 20ms */
+ int timeout_us = 20000;
+
+ clk |= SDHCI_CLOCK_CARD_EN;
+ sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+ if (read_poll_timeout_atomic(sdhci_readw, val, (val & SDHCI_CLOCK_INT_STABLE),
+ 10, timeout_us, true, host, SDHCI_CLOCK_CONTROL)) {
+ pr_err("%s: Internal clock never stabilised.\n", mmc_hostname(host->mmc));
+ sdhci_dumpregs(host);
+ return 1;
+ }
+ return 0;
+}
+
/*****************************************************************************\
* *
* Driver init/exit *
@@ -564,6 +596,10 @@ static int sdhci_uhs2_host_ops_init(struct sdhci_host *host)
if (!host->mmc_host_ops.uhs2_detect_init)
host->mmc_host_ops.uhs2_detect_init = sdhci_uhs2_do_detect_init;
+ if (!host->mmc_host_ops.uhs2_disable_clk)
+ host->mmc_host_ops.uhs2_disable_clk = sdhci_uhs2_disable_clk;
+ if (!host->mmc_host_ops.uhs2_enable_clk)
+ host->mmc_host_ops.uhs2_enable_clk = sdhci_uhs2_enable_clk;
return 0;
}