From patchwork Fri Oct 14 22:10:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melody Olvera X-Patchwork-Id: 2871 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp397554wrs; Fri, 14 Oct 2022 15:13:04 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7MAIAoDpxFGhLk7emOFsklWsFuLLgqq9uN3c+BrISltk1iuQk2ugG/aNo+HmO13eQAahcw X-Received: by 2002:a05:6402:2074:b0:458:ad26:d5c2 with SMTP id bd20-20020a056402207400b00458ad26d5c2mr6334574edb.332.1665785584032; Fri, 14 Oct 2022 15:13:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665785584; cv=none; d=google.com; s=arc-20160816; b=RgEFdHSzBrUszGhvebBxtcKXPuj4H0JSwoRGQ8nueDGv0+8hKIhu5MV6WsRVsmsLne 7MkckukVdkKiVJbOXgMDMoOCOAByio0ZYaZWBMGBdRlJcRuLbFurXDkWmtvLYWrFwT5t PP8Ag1H2SUHvP90Ie4jOhoICq48Yl+Zi7Xs6wODCD1m3ZMDEelvJKqoKYgAxY4dcynH+ fDQ4dYElO6DuAXBsOOGtebgcL+ytqoh5r6sEnn/58wqhm6MOIghZ8IddthdTO+1p9d9Y stpcnhgthNbkfdKzwWEOlX2fu/u8IER7QyVIQVnsJynX5DFf+rv7Kb5Rdw4ButRsEK5B m5aw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=IVXCDTmtJ9MZtZj0X1aSf97KGfN6jclv/rAdOONBIvU=; b=FJhGzv9W6gLPhhCkYsvbtAuONmU7LuKqDoTDASy0r6nAERcEzNNEtnlf3fLlbXvsHP 36QXuBtvccrUhLGFc4iOP1n+6u8f9Vdb0zi6jtl6SttTMi1lFXZKUhpEyPYUVxs5ONTI 1YVVWsXQKU4yHFIOrZI0UInnQpG/hwYS+DQb7+edoPryXRyuyzvk/0/aAkxWQH6IhF2k /g9iVZ0P7+UP2BK+BqhdmEnqD8S7K2ee6JWz8w9Mlm1GT7nmij8X/C/EFkrC1lfWrxn5 mZz01rmaRVNAyhQ2JTL88Ui+zYRWOluRTatZ6h7yz+yHEOMGTqY7cpXFeDpHGaC1dTAx GqqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=Z0fc7BTQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f7-20020a056402354700b004573107a5basi3546722edd.352.2022.10.14.15.12.38; Fri, 14 Oct 2022 15:13:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=Z0fc7BTQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229776AbiJNWLE (ORCPT + 99 others); Fri, 14 Oct 2022 18:11:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229615AbiJNWKo (ORCPT ); Fri, 14 Oct 2022 18:10:44 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2AE6BFAE5E; Fri, 14 Oct 2022 15:10:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1665785443; x=1697321443; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IVXCDTmtJ9MZtZj0X1aSf97KGfN6jclv/rAdOONBIvU=; b=Z0fc7BTQ3zIW2UJBSd7w/exSDtj3D1fYUxRYBszsYISNk8DIIOxsAvC1 pvkup9eHw4b5xhwVj8o5O5EzGtVpth40z5tn2nFYuiNegOyYYCYexCgS5 LtG34Zkr07R3t1Nzma/sIZkV0fW2uY/VuaVxen1vZ14Hfo84I6POCpt2v k=; Received: from unknown (HELO ironmsg04-sd.qualcomm.com) ([10.53.140.144]) by alexa-out-sd-01.qualcomm.com with ESMTP; 14 Oct 2022 15:10:38 -0700 X-QCInternal: smtphost Received: from nasanex01b.na.qualcomm.com ([10.46.141.250]) by ironmsg04-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2022 15:10:37 -0700 Received: from hu-molvera-sd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 14 Oct 2022 15:10:23 -0700 From: Melody Olvera To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner , Marc Zyngier CC: , , , , Imran Shaik , Melody Olvera Subject: [PATCH v2 3/6] clk: qcom: branch: Add BRANCH_HALT_INVERT flag support for branch clocks Date: Fri, 14 Oct 2022 15:10:08 -0700 Message-ID: <20221014221011.7360-4-quic_molvera@quicinc.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20221014221011.7360-1-quic_molvera@quicinc.com> References: <20221014221011.7360-1-quic_molvera@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746702784616719626?= X-GMAIL-MSGID: =?utf-8?q?1746702784616719626?= From: Imran Shaik Add the BRANCH_HALT_INVERT flag to handle the inverted status bit check for branch clocks. Invert branch halt would indicate the clock ON when CLK_OFF bit is '1' and OFF when CLK_OFF bit is '0'. Signed-off-by: Imran Shaik Signed-off-by: Melody Olvera --- drivers/clk/qcom/clk-branch.c | 5 +++++ drivers/clk/qcom/clk-branch.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c index f869fc6aaed6..b5dc1f4ef277 100644 --- a/drivers/clk/qcom/clk-branch.c +++ b/drivers/clk/qcom/clk-branch.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2013, The Linux Foundation. All rights reserved. + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -56,6 +57,10 @@ static bool clk_branch2_check_halt(const struct clk_branch *br, bool enabling) if (enabling) { val &= mask; + + if (br->halt_check == BRANCH_HALT_INVERT) + return (val & BRANCH_CLK_OFF) == BRANCH_CLK_OFF; + return (val & BRANCH_CLK_OFF) == 0 || val == BRANCH_NOC_FSM_STATUS_ON; } else { diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h index 17a58119165e..4ac1debeb91e 100644 --- a/drivers/clk/qcom/clk-branch.h +++ b/drivers/clk/qcom/clk-branch.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2013, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __QCOM_CLK_BRANCH_H__ #define __QCOM_CLK_BRANCH_H__ @@ -33,6 +34,7 @@ struct clk_branch { #define BRANCH_HALT_ENABLE_VOTED (BRANCH_HALT_ENABLE | BRANCH_VOTED) #define BRANCH_HALT_DELAY 2 /* No bit to check; just delay */ #define BRANCH_HALT_SKIP 3 /* Don't check halt bit */ +#define BRANCH_HALT_INVERT 4 /* Invert logic for halt bit */ struct clk_regmap clkr; };