diff mbox series

[v3,1/2] firmware: xilinx: Add pm api function for PL config reg readback

Message ID 20221013090556.741357-2-nava.kishore.manne@amd.com
State New
Headers
Series Adds status interface for zynqmp-fpga |

Commit Message

Manne, Nava kishore Oct. 13, 2022, 9:05 a.m. UTC 
  Adds PM API for performing Programmable Logic(PL) configuration
register readback. It provides an interface to the firmware(pmufw)
to readback the FPGA configuration register.

Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
---
hanges for v2:
              - None.

Changes for v3:
              - Updated API and config reg read-back handling logic
              - Updated the commit msg to align with the changes.

 drivers/firmware/xilinx/zynqmp.c     | 35 ++++++++++++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h | 11 +++++++++
 2 files changed, 46 insertions(+)

Comments

kernel test robot Oct. 13, 2022, 1:48 p.m. UTC | #1 
Hi Nava,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on v6.0]
[cannot apply to xilinx-xlnx/master linus/master next-20221013]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Nava-kishore-Manne/Adds-status-interface-for-zynqmp-fpga/20221013-170902
config: arc-randconfig-r043-20221013
compiler: arceb-elf-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/53624ba21db021d42d5009e5591e4b69d91560b0
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Nava-kishore-Manne/Adds-status-interface-for-zynqmp-fpga/20221013-170902
        git checkout 53624ba21db021d42d5009e5591e4b69d91560b0
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arc SHELL=/bin/bash drivers/spi/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   In file included from drivers/spi/spi-zynqmp-gqspi.c:13:
>> include/linux/firmware/xlnx-zynqmp.h:755:5: warning: no previous prototype for 'zynqmp_pm_fpga_get_config_status' [-Wmissing-prototypes]
     755 | int zynqmp_pm_fpga_get_config_status(u32 *value)
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


vim +/zynqmp_pm_fpga_get_config_status +755 include/linux/firmware/xlnx-zynqmp.h

   754	
 > 755	int zynqmp_pm_fpga_get_config_status(u32 *value)
   756	{
   757		return -ENODEV;
   758	}
   759	#endif
   760
kernel test robot Oct. 13, 2022, 1:48 p.m. UTC | #2 
Hi Nava,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on v6.0]
[cannot apply to xilinx-xlnx/master linus/master next-20221013]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Nava-kishore-Manne/Adds-status-interface-for-zynqmp-fpga/20221013-170902
base:    4fe89d07dcc2804c8b562f6c7896a45643d34b2f
config: hexagon-randconfig-r045-20221013
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 791a7ae1ba3efd6bca96338e10ffde557ba83920)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/53624ba21db021d42d5009e5591e4b69d91560b0
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Nava-kishore-Manne/Adds-status-interface-for-zynqmp-fpga/20221013-170902
        git checkout 53624ba21db021d42d5009e5591e4b69d91560b0
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=hexagon SHELL=/bin/bash drivers/crypto/xilinx/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   In file included from drivers/crypto/xilinx/zynqmp-aes-gcm.c:18:
>> include/linux/firmware/xlnx-zynqmp.h:755:5: warning: no previous prototype for function 'zynqmp_pm_fpga_get_config_status' [-Wmissing-prototypes]
   int zynqmp_pm_fpga_get_config_status(u32 *value)
       ^
   include/linux/firmware/xlnx-zynqmp.h:755:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   int zynqmp_pm_fpga_get_config_status(u32 *value)
   ^
   static 
   1 warning generated.


vim +/zynqmp_pm_fpga_get_config_status +755 include/linux/firmware/xlnx-zynqmp.h

   754	
 > 755	int zynqmp_pm_fpga_get_config_status(u32 *value)
   756	{
   757		return -ENODEV;
   758	}
   759	#endif
   760
kernel test robot Oct. 13, 2022, 1:48 p.m. UTC | #3 
Hi Nava,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on v6.0]
[cannot apply to xilinx-xlnx/master linus/master next-20221013]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Nava-kishore-Manne/Adds-status-interface-for-zynqmp-fpga/20221013-170902
base:    4fe89d07dcc2804c8b562f6c7896a45643d34b2f
config: riscv-randconfig-r042-20221013
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 791a7ae1ba3efd6bca96338e10ffde557ba83920)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install riscv cross compiling tool for clang build
        # apt-get install binutils-riscv64-linux-gnu
        # https://github.com/intel-lab-lkp/linux/commit/53624ba21db021d42d5009e5591e4b69d91560b0
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Nava-kishore-Manne/Adds-status-interface-for-zynqmp-fpga/20221013-170902
        git checkout 53624ba21db021d42d5009e5591e4b69d91560b0
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> ld.lld: error: duplicate symbol: zynqmp_pm_fpga_get_config_status
   >>> defined at spi-cadence-quadspi.c
   >>>            spi/spi-cadence-quadspi.o:(zynqmp_pm_fpga_get_config_status) in archive drivers/built-in.a
   >>> defined at zynqmp-aes-gcm.c
   >>>            crypto/xilinx/zynqmp-aes-gcm.o:(.text+0x0) in archive drivers/built-in.a
--
>> ld.lld: error: duplicate symbol: zynqmp_pm_fpga_get_config_status
   >>> defined at spi-cadence-quadspi.c
   >>>            spi/spi-cadence-quadspi.o:(zynqmp_pm_fpga_get_config_status) in archive drivers/built-in.a
   >>> defined at zynqmp-fpga.c
   >>>            fpga/zynqmp-fpga.o:(.text+0x0) in archive drivers/built-in.a
--
>> ld.lld: error: duplicate symbol: zynqmp_pm_fpga_get_config_status
   >>> defined at spi-cadence-quadspi.c
   >>>            spi/spi-cadence-quadspi.o:(zynqmp_pm_fpga_get_config_status) in archive drivers/built-in.a
   >>> defined at versal-fpga.c
   >>>            fpga/versal-fpga.o:(.text+0x0) in archive drivers/built-in.a
kernel test robot Oct. 13, 2022, 2:59 p.m. UTC | #4 
Hi Nava,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on v6.0]
[cannot apply to xilinx-xlnx/master linus/master next-20221013]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Nava-kishore-Manne/Adds-status-interface-for-zynqmp-fpga/20221013-170902
base:    4fe89d07dcc2804c8b562f6c7896a45643d34b2f
config: m68k-allyesconfig
compiler: m68k-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/53624ba21db021d42d5009e5591e4b69d91560b0
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Nava-kishore-Manne/Adds-status-interface-for-zynqmp-fpga/20221013-170902
        git checkout 53624ba21db021d42d5009e5591e4b69d91560b0
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   m68k-linux-ld: drivers/spi/spi-zynqmp-gqspi.o: in function `zynqmp_pm_fpga_get_config_status':
>> spi-zynqmp-gqspi.c:(.text+0xf64): multiple definition of `zynqmp_pm_fpga_get_config_status'; drivers/spi/spi-cadence-quadspi.o:spi-cadence-quadspi.c:(.text+0x1bbe): first defined here
   m68k-linux-ld: drivers/mmc/host/sdhci-of-arasan.o: in function `zynqmp_pm_fpga_get_config_status':
   sdhci-of-arasan.c:(.text+0x14c8): multiple definition of `zynqmp_pm_fpga_get_config_status'; drivers/spi/spi-cadence-quadspi.o:spi-cadence-quadspi.c:(.text+0x1bbe): first defined here
   m68k-linux-ld: drivers/crypto/xilinx/zynqmp-aes-gcm.o: in function `zynqmp_pm_fpga_get_config_status':
   zynqmp-aes-gcm.c:(.text+0x5f0): multiple definition of `zynqmp_pm_fpga_get_config_status'; drivers/spi/spi-cadence-quadspi.o:spi-cadence-quadspi.c:(.text+0x1bbe): first defined here
   m68k-linux-ld: drivers/crypto/xilinx/zynqmp-sha.o: in function `zynqmp_pm_fpga_get_config_status':
   zynqmp-sha.c:(.text+0x1d2): multiple definition of `zynqmp_pm_fpga_get_config_status'; drivers/spi/spi-cadence-quadspi.o:spi-cadence-quadspi.c:(.text+0x1bbe): first defined here
   m68k-linux-ld: drivers/fpga/zynqmp-fpga.o: in function `zynqmp_pm_fpga_get_config_status':
   zynqmp-fpga.c:(.text+0xee): multiple definition of `zynqmp_pm_fpga_get_config_status'; drivers/spi/spi-cadence-quadspi.o:spi-cadence-quadspi.c:(.text+0x1bbe): first defined here
   m68k-linux-ld: drivers/fpga/versal-fpga.o: in function `zynqmp_pm_fpga_get_config_status':
   versal-fpga.c:(.text+0xf6): multiple definition of `zynqmp_pm_fpga_get_config_status'; drivers/spi/spi-cadence-quadspi.o:spi-cadence-quadspi.c:(.text+0x1bbe): first defined here
kernel test robot Oct. 13, 2022, 4:51 p.m. UTC | #5 
Hi Nava,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on v6.0]
[cannot apply to xilinx-xlnx/master linus/master next-20221013]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Nava-kishore-Manne/Adds-status-interface-for-zynqmp-fpga/20221013-170902
base:    4fe89d07dcc2804c8b562f6c7896a45643d34b2f
config: m68k-randconfig-r013-20221012
compiler: m68k-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/53624ba21db021d42d5009e5591e4b69d91560b0
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Nava-kishore-Manne/Adds-status-interface-for-zynqmp-fpga/20221013-170902
        git checkout 53624ba21db021d42d5009e5591e4b69d91560b0
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   m68k-linux-ld: m68k-linux-ld: DWARF error: could not find abbrev number 466405360
   drivers/crypto/xilinx/zynqmp-aes-gcm.o: in function `zynqmp_pm_fpga_get_config_status':
>> zynqmp-aes-gcm.c:(.text+0x5f8): multiple definition of `zynqmp_pm_fpga_get_config_status'; m68k-linux-ld: DWARF error: could not find abbrev number 1137017
   drivers/spi/spi-zynqmp-gqspi.o:spi-zynqmp-gqspi.c:(.text+0xe1a): first defined here
   m68k-linux-ld: m68k-linux-ld: DWARF error: could not find abbrev number 14981
   drivers/fpga/zynqmp-fpga.o: in function `zynqmp_pm_fpga_get_config_status':
>> zynqmp-fpga.c:(.text+0xe6): multiple definition of `zynqmp_pm_fpga_get_config_status'; drivers/spi/spi-zynqmp-gqspi.o:spi-zynqmp-gqspi.c:(.text+0xe1a): first defined here
Xu Yilun Oct. 14, 2022, 3:33 p.m. UTC | #6 
On 2022-10-13 at 14:35:55 +0530, Nava kishore Manne wrote:
> Adds PM API for performing Programmable Logic(PL) configuration
> register readback. It provides an interface to the firmware(pmufw)
> to readback the FPGA configuration register.
> 
> Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
> ---
> hanges for v2:
>               - None.
> 
> Changes for v3:
>               - Updated API and config reg read-back handling logic
>               - Updated the commit msg to align with the changes.
> 
>  drivers/firmware/xilinx/zynqmp.c     | 35 ++++++++++++++++++++++++++++
>  include/linux/firmware/xlnx-zynqmp.h | 11 +++++++++
>  2 files changed, 46 insertions(+)
> 
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index d1f652802181..045a113434c2 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -941,6 +941,41 @@ int zynqmp_pm_fpga_get_status(u32 *value)
>  }
>  EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
>  
> +/**
> + * zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status.
> + * @value: Buffer to store FPGA configuration status.
> + *
> + * This function provides access to the pmufw to get the FPGA configuration
> + * status
> + *
> + * Return: Returns status, either success or error+reason

As mentioned before, please at least specify what value is success

> + */
> +int zynqmp_pm_fpga_get_config_status(u32 *value)
> +{
> +	u32 ret_payload[PAYLOAD_ARG_CNT];
> +	u32 buf, phys_lower_addr, phys_upper_addr, addr;

reverse santa tree, please

> +	int ret;
> +
> +	if (!value)
> +		return -EINVAL;
> +
> +	addr = (u64)&buf;
> +
> +	phys_lower_addr = lower_32_bits(addr);
> +	phys_upper_addr = upper_32_bits(addr);

u64 addr???

> +
> +	ret = zynqmp_pm_invoke_fn(PM_FPGA_READ,
> +				  XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET,
> +				  phys_lower_addr, phys_upper_addr,
> +				  XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG,
> +				  ret_payload);
> +
> +	*value = ret_payload[1];
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status);
> +
>  /**
>   * zynqmp_pm_pinctrl_request - Request Pin from firmware
>   * @pin: Pin number to request
> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
> index 9f50dacbf7d6..34b0a9171293 100644
> --- a/include/linux/firmware/xlnx-zynqmp.h
> +++ b/include/linux/firmware/xlnx-zynqmp.h
> @@ -70,6 +70,10 @@
>  #define XILINX_ZYNQMP_PM_FPGA_FULL	0x0U
>  #define XILINX_ZYNQMP_PM_FPGA_PARTIAL	BIT(0)
>  
> +/* FPGA Status Reg */
> +#define XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET	7U
> +#define XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG		0U
> +
>  /*
>   * Node IDs for the Error Events.
>   */
> @@ -117,6 +121,7 @@ enum pm_api_id {
>  	PM_CLOCK_GETRATE = 42,
>  	PM_CLOCK_SETPARENT = 43,
>  	PM_CLOCK_GETPARENT = 44,
> +	PM_FPGA_READ = 46,
>  	PM_SECURE_AES = 47,
>  	PM_FEATURE_CHECK = 63,
>  };
> @@ -475,6 +480,7 @@ int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id);
>  int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value);
>  int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, u32 *payload);
>  int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset);
> +int zynqmp_pm_fpga_get_config_status(u32 *value);
>  #else
>  static inline int zynqmp_pm_get_api_version(u32 *version)
>  {
> @@ -745,6 +751,11 @@ static inline int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
>  {
>  	return -ENODEV;
>  }
> +
> +int zynqmp_pm_fpga_get_config_status(u32 *value)
> +{
> +	return -ENODEV;
> +}
>  #endif
>  
>  #endif /* __FIRMWARE_ZYNQMP_H__ */
> -- 
> 2.25.1
>
diff mbox series

Patch

diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index d1f652802181..045a113434c2 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -941,6 +941,41 @@  int zynqmp_pm_fpga_get_status(u32 *value)
 }
 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
 
+/**
+ * zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status.
+ * @value: Buffer to store FPGA configuration status.
+ *
+ * This function provides access to the pmufw to get the FPGA configuration
+ * status
+ *
+ * Return: Returns status, either success or error+reason
+ */
+int zynqmp_pm_fpga_get_config_status(u32 *value)
+{
+	u32 ret_payload[PAYLOAD_ARG_CNT];
+	u32 buf, phys_lower_addr, phys_upper_addr, addr;
+	int ret;
+
+	if (!value)
+		return -EINVAL;
+
+	addr = (u64)&buf;
+
+	phys_lower_addr = lower_32_bits(addr);
+	phys_upper_addr = upper_32_bits(addr);
+
+	ret = zynqmp_pm_invoke_fn(PM_FPGA_READ,
+				  XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET,
+				  phys_lower_addr, phys_upper_addr,
+				  XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG,
+				  ret_payload);
+
+	*value = ret_payload[1];
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status);
+
 /**
  * zynqmp_pm_pinctrl_request - Request Pin from firmware
  * @pin: Pin number to request
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 9f50dacbf7d6..34b0a9171293 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -70,6 +70,10 @@ 
 #define XILINX_ZYNQMP_PM_FPGA_FULL	0x0U
 #define XILINX_ZYNQMP_PM_FPGA_PARTIAL	BIT(0)
 
+/* FPGA Status Reg */
+#define XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET	7U
+#define XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG		0U
+
 /*
  * Node IDs for the Error Events.
  */
@@ -117,6 +121,7 @@  enum pm_api_id {
 	PM_CLOCK_GETRATE = 42,
 	PM_CLOCK_SETPARENT = 43,
 	PM_CLOCK_GETPARENT = 44,
+	PM_FPGA_READ = 46,
 	PM_SECURE_AES = 47,
 	PM_FEATURE_CHECK = 63,
 };
@@ -475,6 +480,7 @@  int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id);
 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value);
 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, u32 *payload);
 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset);
+int zynqmp_pm_fpga_get_config_status(u32 *value);
 #else
 static inline int zynqmp_pm_get_api_version(u32 *version)
 {
@@ -745,6 +751,11 @@  static inline int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
 {
 	return -ENODEV;
 }
+
+int zynqmp_pm_fpga_get_config_status(u32 *value)
+{
+	return -ENODEV;
+}
 #endif
 
 #endif /* __FIRMWARE_ZYNQMP_H__ */