From patchwork Wed Jan 31 07:21:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot2 for Thomas Gleixner X-Patchwork-Id: 194540 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7301:2087:b0:106:209c:c626 with SMTP id gs7csp1721894dyb; Tue, 30 Jan 2024 23:21:50 -0800 (PST) X-Google-Smtp-Source: AGHT+IHwnCb+Z0dx0dtdvqGFh8r97U2kV/ApbH0XkXOztLvV25AJ2w2DYs6xV8od7k/qys7AKK8+ X-Received: by 2002:aa7:9a50:0:b0:6db:dbe7:1b5 with SMTP id x16-20020aa79a50000000b006dbdbe701b5mr878364pfj.31.1706685710097; Tue, 30 Jan 2024 23:21:50 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1706685710; cv=pass; d=google.com; s=arc-20160816; b=rnpMt5bd4SuL5hP1tM2G9Gl3y5oLBFC8947rCsz05Fgz5q+w7bKPIILfFZJWJ5xWb1 HmcGq6CUm+cXTxHcjeFnqmziAvGZfmgdKbznxB7v7gIEpjiy0o6qqUuxYgQ3WlYIzr4H eHi0lgQV82qWzQPO0guZLgy8fWU6SJmyUw3qmTYmSzUjD1SWWTCt1dp8aLdowdUu2CsJ mr6iyjEnf7F1YBQkaCL08NvzPPE5CFAR9CK6vkoEFMVc9x45kXpIFkBg6PZjkJn6VkB7 7irQZlOBZlBBc53v5ODe2iTEN+83zMMjZ0Xl1NGy45NmWnaWzrRil95HnkW9S++b7hDp Owlg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:precedence:robot-unsubscribe:robot-id :message-id:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:in-reply-to:cc:subject:to:reply-to:sender :from:dkim-signature:dkim-signature:date; bh=RlKjq9jrAuFiVS25p9BnOCOg7PFYNPRinO3Roqp3A5g=; fh=wEL+/g57HSRmvgLx5u09VaEXXqi4d/BDqInen44qoq4=; b=RJ+HYtVAklYVWntCgW9Sg3XA8vUlaYCixwd8a7gGnpASNSTIph86njhEaZRrsq5NoF 0r0i45PbsbdouigRV7fvu36DLKMKlnvHVyIXR2KdtNOBZt3XIa+f4RWy4YegLNooJCTA gXM7mDVeK+5Zlbo/sFaIHsnpPiM+39c0DXUYp+zt7xIm4P36sWRJuQcirswv4DdVoeqe EjVGPpnpzyd2wIWYXq1P6eN4BpHmiqoHTVOcW40lMJ7OgRz+IGxAmzW+zROSvaF3p6Qb iRxTcuO9y4Rltz8ezqmFk/v+CG9Wllpp2wWcHBWIVR9cTW8xct5yjknkLOk7KRT76Bnb g5oQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=s1HP0BXS; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-45890-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-45890-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de X-Forwarded-Encrypted: i=1; AJvYcCUMiTVPkN3X46i5rYHzJdN6ezbj/TE9NtBh7fqEMDed+NNAd+6HJ0iWec2jKRLUW+Vb8GcPw6BTOy945KI4NuPxuByoDw== Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [2604:1380:45e3:2400::1]) by mx.google.com with ESMTPS id l128-20020a632586000000b005d8bbd208e3si6733311pgl.162.2024.01.30.23.21.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 23:21:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-45890-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=s1HP0BXS; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-45890-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-45890-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id C68F4283E63 for ; Wed, 31 Jan 2024 07:21:49 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 44C5A58207; Wed, 31 Jan 2024 07:21:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="s1HP0BXS"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="9A7i+9mH" Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9F8A4F1E0; Wed, 31 Jan 2024 07:21:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706685670; cv=none; b=u+CVdEWsZLptxa8CSZ65hLY+WJ6nXqZTbzV5MCsOLul5v6yD6SDznytrE6lMGRRAEGIv7niiNrAMGuc4ak1cNX2YxKJoClzsgXBtj0Mrg7s1MeRHIG+a54KEQiKeK8TbUtaNebe0pwSu39Mf15G7r4mJAiQk6W/IetybWMA89sw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706685670; c=relaxed/simple; bh=JVBiuCE5M+gXf3Sfnd1UxGuRYdOuZgAOHcK2Z6zJMzg=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=nSmLUYKbeGI0iiN3AQnVGzXouuXGHwJtirzzK9xTafo0UCLMpD6DUeTn1ZFsxfdR85/6hv/P2xAEnPmnHy2Nn+TEr7UIa3PEJlejVasm0fDm047Uj+9Y8cbt2D84HtGRn4lsMM9zG98eSUZEi9guJ4C6y8ZzmznF56j9koT8Yic= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=s1HP0BXS; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=9A7i+9mH; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Date: Wed, 31 Jan 2024 07:21:05 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1706685666; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RlKjq9jrAuFiVS25p9BnOCOg7PFYNPRinO3Roqp3A5g=; b=s1HP0BXSc4fEDfoSqVX93aZX6oFfv37akKAmtgiOknkXRjw+kOY3E7gE3ylJDcpOzmO22D h8EKOWHlRwWFDkmKkN0bk0IHUBBm9y8W9nEbg8Qu9zjbIKih6/PXiL5bVOrkc1jxSC/msq S8no/KYQbuCCPi9cFLf2UYBTppPKNGKDRbj1Jyyfyjy37JFl06c2P/LBIOX9f8L+3Y5v2o JNl3bDyADgR1KEz5G+37dUeGNFpwoAQk4Jy8Tid6kAdZ9oA4DzPE/nYLFxtetN7kB5C4Xg 4YMzKpgBRmDjbi/Np3QrBBuwHbSQnRupALivWLYv1UiaGJL6vxT3PYfauNUMIg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1706685666; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RlKjq9jrAuFiVS25p9BnOCOg7PFYNPRinO3Roqp3A5g=; b=9A7i+9mH/RDNl0MGGJRvO3Gzy4P4qyLCKsMG2P1vXiAXS3T8pMNDqD7R3nVzyR+cbFXgV+ QsTaf7fzq8Kf4bCg== From: "tip-bot2 for H. Peter Anvin (Intel)" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/fred] x86/fred: Invoke FRED initialization code to enable FRED Cc: "H. Peter Anvin (Intel)" , Xin Li , Thomas Gleixner , Shan Kang , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231205105030.8698-36-xin3.li@intel.com> References: <20231205105030.8698-36-xin3.li@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <170668566571.398.17800534215552184936.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784440945606055749 X-GMAIL-MSGID: 1789589674932495546 The following commit has been merged into the x86/fred branch of tip: Commit-ID: b564b0111a3f03d1a92ba87c4b0f054ad1845963 Gitweb: https://git.kernel.org/tip/b564b0111a3f03d1a92ba87c4b0f054ad1845963 Author: H. Peter Anvin (Intel) AuthorDate: Tue, 05 Dec 2023 02:50:24 -08:00 Committer: Borislav Petkov (AMD) CommitterDate: Tue, 30 Jan 2024 18:20:36 +01:00 x86/fred: Invoke FRED initialization code to enable FRED Let cpu_init_exception_handling() call cpu_init_fred_exceptions() to initialize FRED. However if FRED is unavailable or disabled, it falls back to set up TSS IST and initialize IDT. Co-developed-by: Xin Li Signed-off-by: H. Peter Anvin (Intel) Signed-off-by: Xin Li Signed-off-by: Thomas Gleixner Tested-by: Shan Kang Link: https://lore.kernel.org/r/20231205105030.8698-36-xin3.li@intel.com --- arch/x86/kernel/cpu/common.c | 22 +++++++++++++++++----- arch/x86/kernel/irqinit.c | 7 ++++++- arch/x86/kernel/traps.c | 5 ++++- 3 files changed, 27 insertions(+), 7 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 4f5e4aa..cf82e31 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -61,6 +61,7 @@ #include #include #include +#include #include #include #include @@ -2107,7 +2108,15 @@ void syscall_init(void) /* The default user and kernel segments */ wrmsr(MSR_STAR, 0, (__USER32_CS << 16) | __KERNEL_CS); - idt_syscall_init(); + /* + * Except the IA32_STAR MSR, there is NO need to setup SYSCALL and + * SYSENTER MSRs for FRED, because FRED uses the ring 3 FRED + * entrypoint for SYSCALL and SYSENTER, and ERETU is the only legit + * instruction to return to ring 3 (both sysexit and sysret cause + * #UD when FRED is enabled). + */ + if (!cpu_feature_enabled(X86_FEATURE_FRED)) + idt_syscall_init(); } #else /* CONFIG_X86_64 */ @@ -2213,8 +2222,9 @@ void cpu_init_exception_handling(void) /* paranoid_entry() gets the CPU number from the GDT */ setup_getcpu(cpu); - /* IST vectors need TSS to be set up. */ - tss_setup_ist(tss); + /* For IDT mode, IST vectors need to be set in TSS. */ + if (!cpu_feature_enabled(X86_FEATURE_FRED)) + tss_setup_ist(tss); tss_setup_io_bitmap(tss); set_tss_desc(cpu, &get_cpu_entry_area(cpu)->tss.x86_tss); @@ -2223,8 +2233,10 @@ void cpu_init_exception_handling(void) /* GHCB needs to be setup to handle #VC. */ setup_ghcb(); - /* Finally load the IDT */ - load_current_idt(); + if (cpu_feature_enabled(X86_FEATURE_FRED)) + cpu_init_fred_exceptions(); + else + load_current_idt(); } /* diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c index c683666..f79c5ed 100644 --- a/arch/x86/kernel/irqinit.c +++ b/arch/x86/kernel/irqinit.c @@ -28,6 +28,7 @@ #include #include #include +#include #include /* @@ -96,7 +97,11 @@ void __init native_init_IRQ(void) /* Execute any quirks before the call gates are initialised: */ x86_init.irqs.pre_vector_init(); - idt_setup_apic_and_irq_gates(); + if (cpu_feature_enabled(X86_FEATURE_FRED)) + fred_complete_exception_setup(); + else + idt_setup_apic_and_irq_gates(); + lapic_assign_system_vectors(); if (!acpi_ioapic && !of_ioapic && nr_legacy_irqs()) { diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 1b19a17..6cb31df 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -1438,7 +1438,10 @@ void __init trap_init(void) /* Initialize TSS before setting up traps so ISTs work */ cpu_init_exception_handling(); + /* Setup traps as cpu_init() might #GP */ - idt_setup_traps(); + if (!cpu_feature_enabled(X86_FEATURE_FRED)) + idt_setup_traps(); + cpu_init(); }