Message ID | 170663197187.398.15168561144334587796.tip-bot2@tip-bot2 |
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[tip:,x86/sev] x86/speculation: Do not enable Automatic IBRS if SEV-SNP is enabled
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Commit Message
tip-bot2 for Thomas Gleixner
Jan. 30, 2024, 4:26 p.m. UTC
The following commit has been merged into the x86/sev branch of tip: Commit-ID: acaa4b5c4c854b5009f4d4a5395b2609ad0f4937 Gitweb: https://git.kernel.org/tip/acaa4b5c4c854b5009f4d4a5395b2609ad0f4937 Author: Kim Phillips <kim.phillips@amd.com> AuthorDate: Thu, 25 Jan 2024 22:11:02 -06:00 Committer: Borislav Petkov (AMD) <bp@alien8.de> CommitterDate: Mon, 29 Jan 2024 17:19:01 +01:00 x86/speculation: Do not enable Automatic IBRS if SEV-SNP is enabled Without SEV-SNP, Automatic IBRS protects only the kernel. But when SEV-SNP is enabled, the Automatic IBRS protection umbrella widens to all host-side code, including userspace. This protection comes at a cost: reduced userspace indirect branch performance. To avoid this performance loss, don't use Automatic IBRS on SEV-SNP hosts and all back to retpolines instead. [ mdr: squash in changes from review discussion. ] Signed-off-by: Kim Phillips <kim.phillips@amd.com> Signed-off-by: Michael Roth <michael.roth@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Dave Hansen <dave.hansen@intel.com> Link: https://lore.kernel.org/r/20240126041126.1927228-3-michael.roth@amd.com --- arch/x86/kernel/cpu/common.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 0b97bcd..9e35e27 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1355,8 +1355,13 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) /* * AMD's AutoIBRS is equivalent to Intel's eIBRS - use the Intel feature * flag and protect from vendor-specific bugs via the whitelist. + * + * Don't use AutoIBRS when SNP is enabled because it degrades host + * userspace indirect branch performance. */ - if ((ia32_cap & ARCH_CAP_IBRS_ALL) || cpu_has(c, X86_FEATURE_AUTOIBRS)) { + if ((ia32_cap & ARCH_CAP_IBRS_ALL) || + (cpu_has(c, X86_FEATURE_AUTOIBRS) && + !cpu_feature_enabled(X86_FEATURE_SEV_SNP))) { setup_force_cpu_cap(X86_FEATURE_IBRS_ENHANCED); if (!cpu_matches(cpu_vuln_whitelist, NO_EIBRS_PBRSB) && !(ia32_cap & ARCH_CAP_PBRSB_NO))