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bh=6ZrM9m4TO/HyPoXRJrWrXkINV1Hzr5RtSOTqRMvCMgg=; b=hRkx7xq6o51QhIns8D6htHAb6lYggpjI4zNxLYFNmJdOC53l4XJOH5921cWDRh37YRgMuy tplG6Nwi39reQLDw== From: "tip-bot2 for Michael Roth" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/sev] x86/cpufeatures: Enable/unmask SEV-SNP CPU feature Cc: Michael Roth , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240126041126.1927228-23-michael.roth@amd.com> References: <20240126041126.1927228-23-michael.roth@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <170663195756.398.9260239005987391538.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789126987727872501 X-GMAIL-MSGID: 1789533394790304357 The following commit has been merged into the x86/sev branch of tip: Commit-ID: c3b86e61b75645276aa2565649a6da5d6e77030f Gitweb: https://git.kernel.org/tip/c3b86e61b75645276aa2565649a6da5d6e77030f Author: Michael Roth AuthorDate: Thu, 25 Jan 2024 22:11:22 -06:00 Committer: Borislav Petkov (AMD) CommitterDate: Mon, 29 Jan 2024 20:34:19 +01:00 x86/cpufeatures: Enable/unmask SEV-SNP CPU feature With all the required host changes in place, it should now be possible to initialize SNP-related MSR bits, set up RMP table enforcement, and initialize SNP support in firmware while maintaining legacy support for SEV/SEV-ES guests. Go ahead and enable the SNP feature now. Signed-off-by: Michael Roth Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20240126041126.1927228-23-michael.roth@amd.com --- arch/x86/include/asm/disabled-features.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h index fc13bf7..3332d29 100644 --- a/arch/x86/include/asm/disabled-features.h +++ b/arch/x86/include/asm/disabled-features.h @@ -117,7 +117,11 @@ #define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31)) #endif +#ifdef CONFIG_KVM_AMD_SEV +#define DISABLE_SEV_SNP 0 +#else #define DISABLE_SEV_SNP (1 << (X86_FEATURE_SEV_SNP & 31)) +#endif /* * Make sure to add features to the correct mask