[4/4,V2,net-next] net: mana: Assigning IRQ affinity on HT cores

Message ID 1705939259-2859-5-git-send-email-schakrabarti@linux.microsoft.com
State New
Headers
Series net: mana: Assigning IRQ affinity on HT cores |

Commit Message

Souradeep Chakrabarti Jan. 22, 2024, 4 p.m. UTC
  Existing MANA design assigns IRQ to every CPU, including sibling
hyper-threads. This may cause multiple IRQs to be active simultaneously
in the same core and may reduce the network performance.

Improve the performance by assigning IRQ to non sibling CPUs in local
NUMA node. The performance improvement we are getting using ntttcp with
following patch is around 15 percent against existing design and
approximately 11 percent, when trying to assign one IRQ in each core
across NUMA nodes, if enough cores are present.
The change will improve the performance for the system
with high number of CPU, where number of CPUs in a node is more than
64 CPUs. Nodes with 64 CPUs or less than 64 CPUs will not be affected
by this change.

The performance study was done using ntttcp tool in Azure.
The node had 2 nodes with 32 cores each, total 128 vCPU and number of channels
were 32 for 32 RX rings.

The below table shows a comparison between existing design and new
design:

IRQ   node-num    core-num   CPU        performance(%)
1      0 | 0       0 | 0     0 | 0-1     0
2      0 | 0       0 | 1     1 | 2-3     3
3      0 | 0       1 | 2     2 | 4-5     10
4      0 | 0       1 | 3     3 | 6-7     15
5      0 | 0       2 | 4     4 | 8-9     15
---
---
25     0 | 0       12| 24    24| 48-49   12
---
32     0 | 0       15| 31    31| 62-63   12
33     0 | 0       16| 0     32| 0-1     10
---
64     0 | 0       31| 31    63| 62-63   0

Signed-off-by: Souradeep Chakrabarti <schakrabarti@linux.microsoft.com>
---
 .../net/ethernet/microsoft/mana/gdma_main.c   | 61 +++++++++++++++----
 1 file changed, 50 insertions(+), 11 deletions(-)
  

Comments

Jakub Kicinski Jan. 24, 2024, 1:03 a.m. UTC | #1
On Mon, 22 Jan 2024 08:00:59 -0800 Souradeep Chakrabarti wrote:
> IRQ   node-num    core-num   CPU        performance(%)
> 1      0 | 0       0 | 0     0 | 0-1     0
> 2      0 | 0       0 | 1     1 | 2-3     3
> 3      0 | 0       1 | 2     2 | 4-5     10
> 4      0 | 0       1 | 3     3 | 6-7     15
> 5      0 | 0       2 | 4     4 | 8-9     15
> ---
> ---

Please don't use --- as a line, indent it or use ... because git am
uses --- as a commit message separator. The commit message will get
cut off at the first one of those if we try to apply this.
  
Yury Norov Jan. 24, 2024, 3:20 p.m. UTC | #2
On Mon, Jan 22, 2024 at 08:00:59AM -0800, Souradeep Chakrabarti wrote:
> Existing MANA design assigns IRQ to every CPU, including sibling
> hyper-threads. This may cause multiple IRQs to be active simultaneously
> in the same core and may reduce the network performance.
> 
> Improve the performance by assigning IRQ to non sibling CPUs in local
> NUMA node. The performance improvement we are getting using ntttcp with
> following patch is around 15 percent against existing design and
> approximately 11 percent, when trying to assign one IRQ in each core
> across NUMA nodes, if enough cores are present.
> The change will improve the performance for the system
> with high number of CPU, where number of CPUs in a node is more than
> 64 CPUs. Nodes with 64 CPUs or less than 64 CPUs will not be affected
> by this change.
> 
> The performance study was done using ntttcp tool in Azure.
> The node had 2 nodes with 32 cores each, total 128 vCPU and number of channels
> were 32 for 32 RX rings.
> 
> The below table shows a comparison between existing design and new
> design:
> 
> IRQ   node-num    core-num   CPU        performance(%)
> 1      0 | 0       0 | 0     0 | 0-1     0
> 2      0 | 0       0 | 1     1 | 2-3     3
> 3      0 | 0       1 | 2     2 | 4-5     10
> 4      0 | 0       1 | 3     3 | 6-7     15
> 5      0 | 0       2 | 4     4 | 8-9     15
> ---
> ---
> 25     0 | 0       12| 24    24| 48-49   12
> ---
> 32     0 | 0       15| 31    31| 62-63   12
> 33     0 | 0       16| 0     32| 0-1     10
> ---
> 64     0 | 0       31| 31    63| 62-63   0

Did that omitted lines mean 5-24 : 15%, 25-31 : 12% and 33-63 : 10%?
Or that means that you didn't test those?

Would be nice to have full coverage...

Thanks,
Yury
  
Souradeep Chakrabarti Jan. 25, 2024, 6:05 a.m. UTC | #3
On Tue, Jan 23, 2024 at 05:03:32PM -0800, Jakub Kicinski wrote:
> On Mon, 22 Jan 2024 08:00:59 -0800 Souradeep Chakrabarti wrote:
> > IRQ   node-num    core-num   CPU        performance(%)
> > 1      0 | 0       0 | 0     0 | 0-1     0
> > 2      0 | 0       0 | 1     1 | 2-3     3
> > 3      0 | 0       1 | 2     2 | 4-5     10
> > 4      0 | 0       1 | 3     3 | 6-7     15
> > 5      0 | 0       2 | 4     4 | 8-9     15
> > ---
> > ---
> 
> Please don't use --- as a line, indent it or use ... because git am
> uses --- as a commit message separator. The commit message will get
> cut off at the first one of those if we try to apply this.
> -- 
Thanks for pointing, will fix it in next version.
- Souradeep
> pw-bot: cr
  
Souradeep Chakrabarti Jan. 25, 2024, 6:07 a.m. UTC | #4
On Wed, Jan 24, 2024 at 07:20:27AM -0800, Yury Norov wrote:
> On Mon, Jan 22, 2024 at 08:00:59AM -0800, Souradeep Chakrabarti wrote:
> > Existing MANA design assigns IRQ to every CPU, including sibling
> > hyper-threads. This may cause multiple IRQs to be active simultaneously
> > in the same core and may reduce the network performance.
> > 
> > Improve the performance by assigning IRQ to non sibling CPUs in local
> > NUMA node. The performance improvement we are getting using ntttcp with
> > following patch is around 15 percent against existing design and
> > approximately 11 percent, when trying to assign one IRQ in each core
> > across NUMA nodes, if enough cores are present.
> > The change will improve the performance for the system
> > with high number of CPU, where number of CPUs in a node is more than
> > 64 CPUs. Nodes with 64 CPUs or less than 64 CPUs will not be affected
> > by this change.
> > 
> > The performance study was done using ntttcp tool in Azure.
> > The node had 2 nodes with 32 cores each, total 128 vCPU and number of channels
> > were 32 for 32 RX rings.
> > 
> > The below table shows a comparison between existing design and new
> > design:
> > 
> > IRQ   node-num    core-num   CPU        performance(%)
> > 1      0 | 0       0 | 0     0 | 0-1     0
> > 2      0 | 0       0 | 1     1 | 2-3     3
> > 3      0 | 0       1 | 2     2 | 4-5     10
> > 4      0 | 0       1 | 3     3 | 6-7     15
> > 5      0 | 0       2 | 4     4 | 8-9     15
> > ---
> > ---
> > 25     0 | 0       12| 24    24| 48-49   12
> > ---
> > 32     0 | 0       15| 31    31| 62-63   12
> > 33     0 | 0       16| 0     32| 0-1     10
> > ---
> > 64     0 | 0       31| 31    63| 62-63   0
> 
> Did that omitted lines mean 5-24 : 15%, 25-31 : 12% and 33-63 : 10%?
They are same like you have mentioned, so I have skipped those ranges.
Whereever the major changes were there, I have put them.
So it is the full coverage only skimmed a little.
> Or that means that you didn't test those?
> 
> Would be nice to have full coverage...
> 
> Thanks,
> Yury
  

Patch

diff --git a/drivers/net/ethernet/microsoft/mana/gdma_main.c b/drivers/net/ethernet/microsoft/mana/gdma_main.c
index 05a0ac054823..1332db9a08eb 100644
--- a/drivers/net/ethernet/microsoft/mana/gdma_main.c
+++ b/drivers/net/ethernet/microsoft/mana/gdma_main.c
@@ -1249,7 +1249,7 @@  void mana_gd_free_res_map(struct gdma_resource *r)
 	r->size = 0;
 }
 
-static __maybe_unused int irq_setup(unsigned int *irqs, unsigned int len, int node)
+static int irq_setup(unsigned int *irqs, unsigned int len, int node)
 {
 	const struct cpumask *next, *prev = cpu_none_mask;
 	cpumask_var_t cpus __free(free_cpumask_var);
@@ -1280,13 +1280,16 @@  static __maybe_unused int irq_setup(unsigned int *irqs, unsigned int len, int no
 
 static int mana_gd_setup_irqs(struct pci_dev *pdev)
 {
-	unsigned int max_queues_per_port = num_online_cpus();
 	struct gdma_context *gc = pci_get_drvdata(pdev);
+	unsigned int max_queues_per_port;
 	struct gdma_irq_context *gic;
 	unsigned int max_irqs, cpu;
-	int nvec, irq;
+	int start_irq_index = 1;
+	int nvec, *irqs, irq;
 	int err, i = 0, j;
 
+	cpus_read_lock();
+	max_queues_per_port = num_online_cpus();
 	if (max_queues_per_port > MANA_MAX_NUM_QUEUES)
 		max_queues_per_port = MANA_MAX_NUM_QUEUES;
 
@@ -1294,8 +1297,18 @@  static int mana_gd_setup_irqs(struct pci_dev *pdev)
 	max_irqs = max_queues_per_port + 1;
 
 	nvec = pci_alloc_irq_vectors(pdev, 2, max_irqs, PCI_IRQ_MSIX);
-	if (nvec < 0)
+	if (nvec < 0) {
+		cpus_read_unlock();
 		return nvec;
+	}
+	if (nvec <= num_online_cpus())
+		start_irq_index = 0;
+
+	irqs = kmalloc_array((nvec - start_irq_index), sizeof(int), GFP_KERNEL);
+	if (!irqs) {
+		err = -ENOMEM;
+		goto free_irq_vector;
+	}
 
 	gc->irq_contexts = kcalloc(nvec, sizeof(struct gdma_irq_context),
 				   GFP_KERNEL);
@@ -1323,17 +1336,41 @@  static int mana_gd_setup_irqs(struct pci_dev *pdev)
 			goto free_irq;
 		}
 
-		err = request_irq(irq, mana_gd_intr, 0, gic->name, gic);
-		if (err)
-			goto free_irq;
-
-		cpu = cpumask_local_spread(i, gc->numa_node);
-		irq_set_affinity_and_hint(irq, cpumask_of(cpu));
+		if (!i) {
+			err = request_irq(irq, mana_gd_intr, 0, gic->name, gic);
+			if (err)
+				goto free_irq;
+
+			/* If number of IRQ is one extra than number of online CPUs,
+			 * then we need to assign IRQ0 (hwc irq) and IRQ1 to
+			 * same CPU.
+			 * Else we will use different CPUs for IRQ0 and IRQ1.
+			 * Also we are using cpumask_local_spread instead of
+			 * cpumask_first for the node, because the node can be
+			 * mem only.
+			 */
+			if (start_irq_index) {
+				cpu = cpumask_local_spread(i, gc->numa_node);
+				irq_set_affinity_and_hint(irq, cpumask_of(cpu));
+			} else {
+				irqs[start_irq_index] = irq;
+			}
+		} else {
+			irqs[i - start_irq_index] = irq;
+			err = request_irq(irqs[i - start_irq_index], mana_gd_intr, 0,
+					  gic->name, gic);
+			if (err)
+				goto free_irq;
+		}
 	}
 
+	err = irq_setup(irqs, (nvec - start_irq_index), gc->numa_node);
+	if (err)
+		goto free_irq;
+
 	gc->max_num_msix = nvec;
 	gc->num_msix_usable = nvec;
-
+	cpus_read_unlock();
 	return 0;
 
 free_irq:
@@ -1346,8 +1383,10 @@  static int mana_gd_setup_irqs(struct pci_dev *pdev)
 	}
 
 	kfree(gc->irq_contexts);
+	kfree(irqs);
 	gc->irq_contexts = NULL;
 free_irq_vector:
+	cpus_read_unlock();
 	pci_free_irq_vectors(pdev);
 	return err;
 }